@@ -15,6 +15,23 @@
#define CMDQ_EOC_CMD ((u64)((CMDQ_CODE_EOC << CMDQ_OP_CODE_SHIFT)) \
<< 32 | CMDQ_EOC_IRQ_EN)
+u8 cmdq_subsys_base_to_id(struct cmdq_base *clt_base, u32 base)
+{
+ u8 i;
+
+ if (!clt_base)
+ return -EINVAL;
+
+ base = base & 0xFFFF0000;
+ for (i = 0; i < clt_base->count; i++) {
+ if (clt_base->subsys[i].base == base)
+ return clt_base->subsys[i].id;
+ }
+
+ return -EINVAL;
+}
+EXPORT_SYMBOL(cmdq_subsys_base_to_id);
+
static void cmdq_client_timeout(struct timer_list *t)
{
struct cmdq_client *client = from_timer(client, t, timer);
@@ -15,6 +15,16 @@
struct cmdq_pkt;
+struct cmdq_subsys {
+ u32 base;
+ u8 id;
+};
+
+struct cmdq_base {
+ struct cmdq_subsys subsys[32];
+ u8 count;
+};
+
struct cmdq_client {
spinlock_t lock;
u32 pkt_cnt;
@@ -127,4 +137,6 @@ int cmdq_pkt_flush_async(struct cmdq_pkt *pkt, cmdq_async_flush_cb cb,
*/
int cmdq_pkt_flush(struct cmdq_pkt *pkt);
+u8 cmdq_subsys_base_to_id(struct cmdq_base *clt_base, u32 base);
+
#endif /* __MTK_CMDQ_H__ */
GCE cannot know the register base address, we store the subsys-base address relationship in the device node, and store the relationship by cmdq_register_device function. When the client pass the base address and offset into GCE API, we will get the subsys ID by this API. Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com> --- drivers/soc/mediatek/mtk-cmdq-helper.c | 17 +++++++++++++++++ include/linux/soc/mediatek/mtk-cmdq.h | 12 ++++++++++++ 2 files changed, 29 insertions(+)