@@ -751,7 +751,7 @@ static const struct davinci_aintc_config dm355_aintc_config = {
void __init dm355_init_irqs(void)
{
- davinci_aintc_init();
+ davinci_aintc_init(&dm355_aintc_config);
}
static int __init dm355_init_devices(void)
@@ -1008,7 +1008,7 @@ static const struct davinci_aintc_config dm365_aintc_config = {
void __init dm365_init_irqs(void)
{
- davinci_aintc_init();
+ davinci_aintc_init(&dm365_aintc_config);
}
static int __init dm365_init_devices(void)
@@ -685,7 +685,7 @@ static const struct davinci_aintc_config dm644x_aintc_config = {
void __init dm644x_init_irqs(void)
{
- davinci_aintc_init();
+ davinci_aintc_init(&dm644x_aintc_config);
}
void __init dm644x_init_devices(void)
@@ -646,7 +646,7 @@ static const struct davinci_aintc_config dm646x_aintc_config = {
void __init dm646x_init_irqs(void)
{
- davinci_aintc_init();
+ davinci_aintc_init(&dm646x_aintc_config);
}
static int __init dm646x_init_devices(void)
@@ -19,8 +19,6 @@
void davinci_timer_init(struct clk *clk);
-extern void davinci_aintc_init(void);
-
struct davinci_timer_instance {
u32 base;
u32 bottom_irq;
@@ -8,6 +8,7 @@
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
+#include <linux/irqchip/irq-davinci-aintc.h>
#include <linux/io.h>
#include <linux/irqdomain.h>
@@ -77,13 +78,14 @@ davinci_aintc_handle_irq(struct pt_regs *regs)
}
/* ARM Interrupt Controller Initialization */
-void __init davinci_aintc_init(void)
+void __init davinci_aintc_init(const struct davinci_aintc_config *config)
{
- unsigned i, j;
- const u8 *davinci_def_priorities = davinci_soc_info.intc_irq_prios;
+ unsigned int irq_off, reg_off, prio, shift;
int rv, irq_base;
+ const u8 *prios;
- davinci_aintc_base = ioremap(davinci_soc_info.intc_base, SZ_4K);
+ davinci_aintc_base = ioremap(config->reg.start,
+ resource_size(&config->reg));
if (WARN_ON(!davinci_aintc_base))
return;
@@ -109,22 +111,22 @@ void __init davinci_aintc_init(void)
davinci_aintc_writel(~0x0, DAVINCI_AINTC_IRQ_REG0);
davinci_aintc_writel(~0x0, DAVINCI_AINTC_IRQ_REG1);
- for (i = DAVINCI_AINTC_IRQ_INTPRI0_REG; i <= DAVINCI_AINTC_IRQ_INTPRI7_REG; i += 4) {
- u32 pri;
+ prios = config->prios;
- for (j = 0, pri = 0; j < 32; j += 4, davinci_def_priorities++)
- pri |= (*davinci_def_priorities & 0x07) << j;
- davinci_aintc_writel(pri, i);
+ for (reg_off = DAVINCI_AINTC_IRQ_INTPRI0_REG;
+ reg_off <= DAVINCI_AINTC_IRQ_INTPRI7_REG; reg_off += 4) {
+ for (shift = 0, prio = 0; shift < 32; shift += 4, prios++)
+ prio |= (*prios & 0x07) << shift;
+ davinci_aintc_writel(prio, reg_off);
}
- irq_base = irq_alloc_descs(-1, 0, davinci_soc_info.intc_irq_num, 0);
+ irq_base = irq_alloc_descs(-1, 0, config->num_irqs, 0);
if (WARN_ON(irq_base < 0))
return;
davinci_aintc_irq_domain = irq_domain_add_legacy(NULL,
- davinci_soc_info.intc_irq_num,
- irq_base, 0, &irq_domain_simple_ops,
- NULL);
+ config->num_irqs, irq_base, 0,
+ &irq_domain_simple_ops, NULL);
if (WARN_ON(!davinci_aintc_irq_domain))
return;
@@ -134,8 +136,11 @@ void __init davinci_aintc_init(void)
if (WARN_ON(rv))
return;
- for (i = 0, j = 0; i < davinci_soc_info.intc_irq_num; i += 32, j += 0x04)
- davinci_aintc_setup_gc(davinci_aintc_base + j, irq_base + i, 32);
+ for (irq_off = 0, reg_off = 0;
+ irq_off < config->num_irqs;
+ irq_off += 32, reg_off += 0x04)
+ davinci_aintc_setup_gc(davinci_aintc_base + reg_off,
+ irq_base + irq_off, 32);
irq_set_handler(IRQ_TINT1_TINT34, handle_level_irq);
set_handle_irq(davinci_aintc_handle_irq);
@@ -14,4 +14,6 @@ struct davinci_aintc_config {
u8 *prios;
};
+void davinci_aintc_init(const struct davinci_aintc_config *config);
+
#endif /* _LINUX_IRQ_DAVINCI_AINTC_ */