diff mbox series

[10/30,v2] irqchip: ixp4xx: Add OF initialization support

Message ID 20190221154458.23763-11-linus.walleij@linaro.org (mailing list archive)
State New, archived
Headers show
Series ARM: ixp4xx: Modernize and DT support | expand

Commit Message

Linus Walleij Feb. 21, 2019, 3:44 p.m. UTC
This adds support for probing and settin up the IXP4xx
irqchip from device tree.

Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
irqchip maintainers: I am requesting an ACK for this once
you're happy with the driver, as I intend to merge all of
this IXP4xx rework through ARM SoC.
---
 drivers/irqchip/irq-ixp4xx.c | 45 ++++++++++++++++++++++++++++++++++++
 1 file changed, 45 insertions(+)

Comments

Marc Zyngier Feb. 22, 2019, 9:53 a.m. UTC | #1
On Thu, 21 Feb 2019 16:44:38 +0100
Linus Walleij <linus.walleij@linaro.org> wrote:

> This adds support for probing and settin up the IXP4xx
> irqchip from device tree.
> 
> Cc: Marc Zyngier <marc.zyngier@arm.com>
> Cc: Jason Cooper <jason@lakedaemon.net>
> Cc: Thomas Gleixner <tglx@linutronix.de>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
> irqchip maintainers: I am requesting an ACK for this once
> you're happy with the driver, as I intend to merge all of
> this IXP4xx rework through ARM SoC.
> ---
>  drivers/irqchip/irq-ixp4xx.c | 45 ++++++++++++++++++++++++++++++++++++
>  1 file changed, 45 insertions(+)
> 
> diff --git a/drivers/irqchip/irq-ixp4xx.c b/drivers/irqchip/irq-ixp4xx.c
> index 89c80ce047a7..1ea7561fddb7 100644
> --- a/drivers/irqchip/irq-ixp4xx.c
> +++ b/drivers/irqchip/irq-ixp4xx.c
> @@ -15,6 +15,9 @@
>  #include <linux/irqchip.h>
>  #include <linux/irqchip/irq-ixp4xx.h>
>  #include <linux/irqdomain.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/of_irq.h>
>  #include <linux/platform_device.h>
>  #include <linux/cpu.h>
>  
> @@ -360,3 +363,45 @@ void __init ixp4xx_irq_init(resource_size_t irqbase,
>  	}
>  }
>  EXPORT_SYMBOL_GPL(ixp4xx_irq_init);
> +
> +#ifdef CONFIG_OF
> +int __init ixp4xx_of_init_irq(struct device_node *np,
> +			      struct device_node *parent)
> +{
> +	struct ixp4xx_irq *ixi = &ixirq;
> +	void __iomem *base;
> +	struct fwnode_handle *fwnode;
> +	bool is_356;
> +	int ret;
> +
> +	base = of_iomap(np, 0);
> +	if (!base) {
> +		pr_crit("IXP4XX: could not ioremap interrupt controller\n");
> +		return -ENODEV;
> +	}
> +	fwnode = of_node_to_fwnode(np);
> +	if (!fwnode) {
> +		pr_crit("IXP4XX: no domain handle\n");
> +		return -ENODEV;
> +	}

For this to happen, np would have to be NULL. I don't think that's
possible at all, as you managed to get here. So I think you can safely
drop this check.

> +
> +	/* These chip variants have 64 interrupts */
> +	is_356 = of_device_is_compatible(np, "intel,ixp43x-interrupt") ||
> +		of_device_is_compatible(np, "intel,ixp45x-interrupt") ||
> +		of_device_is_compatible(np, "intel,ixp46x-interrupt");
> +
> +	ret = ixp4xx_irq_setup(ixi, base, fwnode, is_356);
> +	if (ret)
> +		pr_crit("IXP4XX: failed to set up irqchip\n");
> +
> +	return ret;
> +}
> +IRQCHIP_DECLARE(ixp42x, "intel,ixp42x-interrupt",
> +		ixp4xx_of_init_irq);
> +IRQCHIP_DECLARE(ixp43x, "intel,ixp43x-interrupt",
> +		ixp4xx_of_init_irq);
> +IRQCHIP_DECLARE(ixp45x, "intel,ixp45x-interrupt",
> +		ixp4xx_of_init_irq);
> +IRQCHIP_DECLARE(ixp46x, "intel,ixp46x-interrupt",
> +		ixp4xx_of_init_irq);
> +#endif


With the above fixed:

Acked-by: Marc Zyngier <marc.zyngier@arm.com>

	M.
diff mbox series

Patch

diff --git a/drivers/irqchip/irq-ixp4xx.c b/drivers/irqchip/irq-ixp4xx.c
index 89c80ce047a7..1ea7561fddb7 100644
--- a/drivers/irqchip/irq-ixp4xx.c
+++ b/drivers/irqchip/irq-ixp4xx.c
@@ -15,6 +15,9 @@ 
 #include <linux/irqchip.h>
 #include <linux/irqchip/irq-ixp4xx.h>
 #include <linux/irqdomain.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
 #include <linux/platform_device.h>
 #include <linux/cpu.h>
 
@@ -360,3 +363,45 @@  void __init ixp4xx_irq_init(resource_size_t irqbase,
 	}
 }
 EXPORT_SYMBOL_GPL(ixp4xx_irq_init);
+
+#ifdef CONFIG_OF
+int __init ixp4xx_of_init_irq(struct device_node *np,
+			      struct device_node *parent)
+{
+	struct ixp4xx_irq *ixi = &ixirq;
+	void __iomem *base;
+	struct fwnode_handle *fwnode;
+	bool is_356;
+	int ret;
+
+	base = of_iomap(np, 0);
+	if (!base) {
+		pr_crit("IXP4XX: could not ioremap interrupt controller\n");
+		return -ENODEV;
+	}
+	fwnode = of_node_to_fwnode(np);
+	if (!fwnode) {
+		pr_crit("IXP4XX: no domain handle\n");
+		return -ENODEV;
+	}
+
+	/* These chip variants have 64 interrupts */
+	is_356 = of_device_is_compatible(np, "intel,ixp43x-interrupt") ||
+		of_device_is_compatible(np, "intel,ixp45x-interrupt") ||
+		of_device_is_compatible(np, "intel,ixp46x-interrupt");
+
+	ret = ixp4xx_irq_setup(ixi, base, fwnode, is_356);
+	if (ret)
+		pr_crit("IXP4XX: failed to set up irqchip\n");
+
+	return ret;
+}
+IRQCHIP_DECLARE(ixp42x, "intel,ixp42x-interrupt",
+		ixp4xx_of_init_irq);
+IRQCHIP_DECLARE(ixp43x, "intel,ixp43x-interrupt",
+		ixp4xx_of_init_irq);
+IRQCHIP_DECLARE(ixp45x, "intel,ixp45x-interrupt",
+		ixp4xx_of_init_irq);
+IRQCHIP_DECLARE(ixp46x, "intel,ixp46x-interrupt",
+		ixp4xx_of_init_irq);
+#endif