| Message ID | 20190613161656.20765-5-julien.grall@arm.com (mailing list archive) |
|---|---|
| State | RFC |
| Headers | show |
| Series | arm64/sve: First steps towards optimizing syscalls | expand |
On Thu, Jun 13, 2019 at 05:16:52PM +0100, Julien Grall wrote: > A follow-up patch will need to update ZCR_EL1.LEN. > > Add a macro that could be re-used in the current and new places to > avoid code duplication. > > Signed-off-by: Julien Grall <julien.grall@arm.com> > > --- > Changes in v2: > - Fix typo in the commit message > --- > arch/arm64/include/asm/fpsimdmacros.h | 19 ++++++++++++------- > 1 file changed, 12 insertions(+), 7 deletions(-) > > diff --git a/arch/arm64/include/asm/fpsimdmacros.h b/arch/arm64/include/asm/fpsimdmacros.h > index e2ab77dd9b4f..5e291d9c1ba0 100644 > --- a/arch/arm64/include/asm/fpsimdmacros.h > +++ b/arch/arm64/include/asm/fpsimdmacros.h > @@ -198,6 +198,17 @@ > .purgem _for__body > .endm > > +/* Update ZCR_EL1.LEN with the new VQ */ > +.macro sve_load_vq xvqminus1, xtmp, xtmp2 > + mrs_s \xtmp, SYS_ZCR_EL1 > + bic \xtmp2, \xtmp, ZCR_ELx_LEN_MASK > + orr \xtmp2, \xtmp2, \xvqminus1 > + cmp \xtmp2, \xtmp > + b.eq 921f > + msr_s SYS_ZCR_EL1, \xtmp2 //self-synchronising > +921: > +.endm > + > .macro sve_save nxbase, xpfpsr, nxtmp > _for n, 0, 31, _sve_str_v \n, \nxbase, \n - 34 > _for n, 0, 15, _sve_str_p \n, \nxbase, \n - 16 > @@ -212,13 +223,7 @@ > .endm > > .macro sve_load nxbase, xpfpsr, xvqminus1, nxtmp, xtmp2 > - mrs_s x\nxtmp, SYS_ZCR_EL1 > - bic \xtmp2, x\nxtmp, ZCR_ELx_LEN_MASK > - orr \xtmp2, \xtmp2, \xvqminus1 > - cmp \xtmp2, x\nxtmp > - b.eq 921f > - msr_s SYS_ZCR_EL1, \xtmp2 // self-synchronising > -921: > + sve_load_vq \xvqminus1, x\nxtmp, \xtmp2 > _for n, 0, 31, _sve_ldr_v \n, \nxbase, \n - 34 > _sve_ldr_p 0, \nxbase > _sve_wrffr 0 Reviewed-by: Dave Martin <Dave.Martin@arm.com> Cheers ---Dave
diff --git a/arch/arm64/include/asm/fpsimdmacros.h b/arch/arm64/include/asm/fpsimdmacros.h index e2ab77dd9b4f..5e291d9c1ba0 100644 --- a/arch/arm64/include/asm/fpsimdmacros.h +++ b/arch/arm64/include/asm/fpsimdmacros.h @@ -198,6 +198,17 @@ .purgem _for__body .endm +/* Update ZCR_EL1.LEN with the new VQ */ +.macro sve_load_vq xvqminus1, xtmp, xtmp2 + mrs_s \xtmp, SYS_ZCR_EL1 + bic \xtmp2, \xtmp, ZCR_ELx_LEN_MASK + orr \xtmp2, \xtmp2, \xvqminus1 + cmp \xtmp2, \xtmp + b.eq 921f + msr_s SYS_ZCR_EL1, \xtmp2 //self-synchronising +921: +.endm + .macro sve_save nxbase, xpfpsr, nxtmp _for n, 0, 31, _sve_str_v \n, \nxbase, \n - 34 _for n, 0, 15, _sve_str_p \n, \nxbase, \n - 16 @@ -212,13 +223,7 @@ .endm .macro sve_load nxbase, xpfpsr, xvqminus1, nxtmp, xtmp2 - mrs_s x\nxtmp, SYS_ZCR_EL1 - bic \xtmp2, x\nxtmp, ZCR_ELx_LEN_MASK - orr \xtmp2, \xtmp2, \xvqminus1 - cmp \xtmp2, x\nxtmp - b.eq 921f - msr_s SYS_ZCR_EL1, \xtmp2 // self-synchronising -921: + sve_load_vq \xvqminus1, x\nxtmp, \xtmp2 _for n, 0, 31, _sve_ldr_v \n, \nxbase, \n - 34 _sve_ldr_p 0, \nxbase _sve_wrffr 0
A follow-up patch will need to update ZCR_EL1.LEN. Add a macro that could be re-used in the current and new places to avoid code duplication. Signed-off-by: Julien Grall <julien.grall@arm.com> --- Changes in v2: - Fix typo in the commit message --- arch/arm64/include/asm/fpsimdmacros.h | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-)