diff mbox series

[v3,16/21] ARM: dts: imx6ull-colibri: Add watchdog

Message ID 20190807082556.5013-17-philippe.schenker@toradex.com (mailing list archive)
State New, archived
Headers show
Series Common patches from downstream development | expand

Commit Message

Philippe Schenker Aug. 7, 2019, 8:26 a.m. UTC
This patch adds the watchdog to the imx6ull-colibri devicetree

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
---

Changes in v3: None
Changes in v2: None

 arch/arm/boot/dts/imx6ull-colibri.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

Comments

Marcel Ziswiler Aug. 9, 2019, 3:43 p.m. UTC | #1
On Wed, 2019-08-07 at 08:26 +0000, Philippe Schenker wrote:
> This patch adds the watchdog to the imx6ull-colibri devicetree
> 
> Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>

Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>

> ---
> 
> Changes in v3: None
> Changes in v2: None
> 
>  arch/arm/boot/dts/imx6ull-colibri.dtsi | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi
> b/arch/arm/boot/dts/imx6ull-colibri.dtsi
> index 1f112ec55e5c..e3220298dd6f 100644
> --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi
> +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi
> @@ -199,6 +199,12 @@
>  	assigned-clock-rates = <0>, <198000000>;
>  };
>  
> +&wdog1 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_wdog>;
> +	fsl,ext-reset-output;
> +};
> +
>  &iomuxc {
>  	pinctrl_can_int: canint-grp {
>  		fsl,pins = <
> @@ -506,6 +512,12 @@
>  			MX6UL_PAD_GPIO1_IO03__OSC32K_32K_OUT	0x14
>  		>;
>  	};
> +
> +	pinctrl_wdog: wdog-grp {
> +		fsl,pins = <
> +			MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY    0x30b0
> +		>;
> +	};
>  };
>  
>  &iomuxc_snvs {
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx6ull-colibri.dtsi
index 1f112ec55e5c..e3220298dd6f 100644
--- a/arch/arm/boot/dts/imx6ull-colibri.dtsi
+++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi
@@ -199,6 +199,12 @@ 
 	assigned-clock-rates = <0>, <198000000>;
 };
 
+&wdog1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_wdog>;
+	fsl,ext-reset-output;
+};
+
 &iomuxc {
 	pinctrl_can_int: canint-grp {
 		fsl,pins = <
@@ -506,6 +512,12 @@ 
 			MX6UL_PAD_GPIO1_IO03__OSC32K_32K_OUT	0x14
 		>;
 	};
+
+	pinctrl_wdog: wdog-grp {
+		fsl,pins = <
+			MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY    0x30b0
+		>;
+	};
 };
 
 &iomuxc_snvs {