diff mbox series

[v2,2/3] arm64: allwinner: h6: add I2C nodes

Message ID 20190816064710.18280-3-bshah@kde.org (mailing list archive)
State New, archived
Headers show
Series Enable the I2C nodes for Allwinner H6 CPU | expand

Commit Message

Bhushan Shah Aug. 16, 2019, 6:47 a.m. UTC
Add device-tree nodes for i2c0 to i2c2, and also add relevant pinctrl
nodes.

Suggested-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Bhushan Shah <bshah@kde.org>
---
Changes in v2:
  - Add the SoC specific compatible string instead of re-using a31 one.

 arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 56 +++++++++++++++++++-
 1 file changed, 55 insertions(+), 1 deletion(-)

Comments

Maxime Ripard Aug. 16, 2019, 7:50 a.m. UTC | #1
On Fri, Aug 16, 2019 at 12:17:09PM +0530, Bhushan Shah wrote:
> Add device-tree nodes for i2c0 to i2c2, and also add relevant pinctrl
> nodes.
>
> Suggested-by: Icenowy Zheng <icenowy@aosc.io>
> Signed-off-by: Bhushan Shah <bshah@kde.org>
> ---
> Changes in v2:
>   - Add the SoC specific compatible string instead of re-using a31 one.
>
>  arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 56 +++++++++++++++++++-
>  1 file changed, 55 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> index bcecca17d61d..a1a329926540 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> @@ -329,6 +329,21 @@
>  				function = "hdmi";
>  			};
>
> +			i2c0_pins: i2c0-pins {
> +				pins = "PD25", "PD26";
> +				function = "i2c0";
> +			};
> +
> +			i2c1_pins: i2c1-pins {
> +				pins = "PH5", "PH6";
> +				function = "i2c1";
> +			};
> +
> +			i2c2_pins: i2c2-pins {
> +				pins = "PD23", "PD24";
> +				function = "i2c2";
> +			};
> +
>  			mmc0_pins: mmc0-pins {
>  				pins = "PF0", "PF1", "PF2", "PF3",
>  				       "PF4", "PF5";
> @@ -464,6 +479,45 @@
>  			status = "disabled";
>  		};
>
> +		i2c0: i2c@5002000 {
> +			compatible = "allwinner,sun50i-h6-i2c";

This isn't going to work if you don't patch the driver to add the
compatible. And this isn't what you described in the binding patch.

Maxime

--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
Bhushan Shah Aug. 16, 2019, 8:23 a.m. UTC | #2
On Fri, Aug 16, 2019 at 09:50:31AM +0200, Maxime Ripard wrote:
> On Fri, Aug 16, 2019 at 12:17:09PM +0530, Bhushan Shah wrote:
> > Add device-tree nodes for i2c0 to i2c2, and also add relevant pinctrl
> > nodes.
> >
> > Suggested-by: Icenowy Zheng <icenowy@aosc.io>
> > Signed-off-by: Bhushan Shah <bshah@kde.org>
> > ---
> > Changes in v2:
> >   - Add the SoC specific compatible string instead of re-using a31 one.
> >
> >  arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 56 +++++++++++++++++++-
> >  1 file changed, 55 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> > index bcecca17d61d..a1a329926540 100644
> > --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> > @@ -329,6 +329,21 @@
> >  				function = "hdmi";
> >  			};
> >
> > +			i2c0_pins: i2c0-pins {
> > +				pins = "PD25", "PD26";
> > +				function = "i2c0";
> > +			};
> > +
> > +			i2c1_pins: i2c1-pins {
> > +				pins = "PH5", "PH6";
> > +				function = "i2c1";
> > +			};
> > +
> > +			i2c2_pins: i2c2-pins {
> > +				pins = "PD23", "PD24";
> > +				function = "i2c2";
> > +			};
> > +
> >  			mmc0_pins: mmc0-pins {
> >  				pins = "PF0", "PF1", "PF2", "PF3",
> >  				       "PF4", "PF5";
> > @@ -464,6 +479,45 @@
> >  			status = "disabled";
> >  		};
> >
> > +		i2c0: i2c@5002000 {
> > +			compatible = "allwinner,sun50i-h6-i2c";
> 
> This isn't going to work if you don't patch the driver to add the
> compatible. And this isn't what you described in the binding patch.

oops, I will correct this in next patch series. Sorry.

> 
> Maxime
> 
> --
> Maxime Ripard, Bootlin
> Embedded Linux and Kernel engineering
> https://bootlin.com
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index bcecca17d61d..a1a329926540 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -329,6 +329,21 @@ 
 				function = "hdmi";
 			};
 
+			i2c0_pins: i2c0-pins {
+				pins = "PD25", "PD26";
+				function = "i2c0";
+			};
+
+			i2c1_pins: i2c1-pins {
+				pins = "PH5", "PH6";
+				function = "i2c1";
+			};
+
+			i2c2_pins: i2c2-pins {
+				pins = "PD23", "PD24";
+				function = "i2c2";
+			};
+
 			mmc0_pins: mmc0-pins {
 				pins = "PF0", "PF1", "PF2", "PF3",
 				       "PF4", "PF5";
@@ -464,6 +479,45 @@ 
 			status = "disabled";
 		};
 
+		i2c0: i2c@5002000 {
+			compatible = "allwinner,sun50i-h6-i2c";
+			reg = <0x05002000 0x400>;
+			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_I2C0>;
+			resets = <&ccu RST_BUS_I2C0>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&i2c0_pins>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		i2c1: i2c@5002400 {
+			compatible = "allwinner,sun50i-h6-i2c";
+			reg = <0x05002400 0x400>;
+			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_I2C1>;
+			resets = <&ccu RST_BUS_I2C1>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&i2c1_pins>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		i2c2: i2c@5002800 {
+			compatible = "allwinner,sun50i-h6-i2c";
+			reg = <0x05002800 0x400>;
+			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_I2C2>;
+			resets = <&ccu RST_BUS_I2C2>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&i2c2_pins>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
 		emac: ethernet@5020000 {
 			compatible = "allwinner,sun50i-h6-emac",
 				     "allwinner,sun50i-a64-emac";
@@ -795,7 +849,7 @@ 
 		};
 
 		r_i2c: i2c@7081400 {
-			compatible = "allwinner,sun6i-a31-i2c";
+			compatible = "allwinner,sun50i-h6-i2c";
 			reg = <0x07081400 0x400>;
 			interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&r_ccu CLK_R_APB2_I2C>;