| Message ID | 20200526161834.29165-4-james.morse@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | KVM: arm64: aarch32 ACTLR accesses | expand |
Hi James, On 2020-05-26 17:18, James Morse wrote: > ACTLR_EL1 is a 64bit register while the 32bit ACTLR is obviously 32bit. > For 32bit software, the extra bits are accessible via ACTLR2... which > KVM doesn't emulate. > > Signed-off-by: James Morse <james.morse@arm.com> > --- > I'm not convinced this is endian safe, but it does match what > kvm_inject_undef32() do. > > The alternative would be to always read the 64bit value, and generate > the 32bit offets like access_vm_reg() does. > > arch/arm64/include/asm/kvm_host.h | 1 + > arch/arm64/kvm/sys_regs_generic_v8.c | 16 +++++++++++++++- > 2 files changed, 16 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/include/asm/kvm_host.h > b/arch/arm64/include/asm/kvm_host.h > index 32c8a675e5a4..5b7538663a8e 100644 > --- a/arch/arm64/include/asm/kvm_host.h > +++ b/arch/arm64/include/asm/kvm_host.h > @@ -185,6 +185,7 @@ enum vcpu_sysreg { > #define c0_CSSELR (CSSELR_EL1 * 2)/* Cache Size Selection Register */ > #define c1_SCTLR (SCTLR_EL1 * 2) /* System Control Register */ > #define c1_ACTLR (ACTLR_EL1 * 2) /* Auxiliary Control Register */ > +#define c1_ACTLR2 (c1_ACTLR + 1) /* ACTLR top 32 bits */ > #define c1_CPACR (CPACR_EL1 * 2) /* Coprocessor Access Control */ > #define c2_TTBR0 (TTBR0_EL1 * 2) /* Translation Table Base Register 0 > */ > #define c2_TTBR0_high (c2_TTBR0 + 1) /* TTBR0 top 32 bits */ > diff --git a/arch/arm64/kvm/sys_regs_generic_v8.c > b/arch/arm64/kvm/sys_regs_generic_v8.c > index 9cb6b4c8355a..ed77bbb48e64 100644 > --- a/arch/arm64/kvm/sys_regs_generic_v8.c > +++ b/arch/arm64/kvm/sys_regs_generic_v8.c > @@ -30,6 +30,18 @@ static bool access_actlr(struct kvm_vcpu *vcpu, > return true; > } > > +static bool access_cp15_actlr(struct kvm_vcpu *vcpu, > + struct sys_reg_params *p, > + const struct sys_reg_desc *r) > +{ > + if (p->is_write) > + return ignore_write(vcpu, p); > + > + p->regval = vcpu_cp15(vcpu, r->reg); > + return true; > + > +} > + > static void reset_actlr(struct kvm_vcpu *vcpu, const struct > sys_reg_desc *r) > { > __vcpu_sys_reg(vcpu, ACTLR_EL1) = read_sysreg(actlr_el1); > @@ -46,7 +58,9 @@ static const struct sys_reg_desc genericv8_sys_regs[] > = { > static const struct sys_reg_desc genericv8_cp15_regs[] = { > /* ACTLR */ > { Op1(0b000), CRn(0b0001), CRm(0b0000), Op2(0b001), > - access_actlr }, > + access_cp15_actlr, NULL, c1_ACTLR }, > + { Op1(0b000), CRn(0b0001), CRm(0b0000), Op2(0b011), > + access_cp15_actlr, NULL, c1_ACTLR2 }, > }; > > static struct kvm_sys_reg_target_table genericv8_target_table = { I'd get rid of any form of storage, and go with something like (untested, again): diff --git a/arch/arm64/kvm/sys_regs_generic_v8.c b/arch/arm64/kvm/sys_regs_generic_v8.c index 9cb6b4c8355a..1b2bf2d37612 100644 --- a/arch/arm64/kvm/sys_regs_generic_v8.c +++ b/arch/arm64/kvm/sys_regs_generic_v8.c @@ -26,13 +26,16 @@ static bool access_actlr(struct kvm_vcpu *vcpu, if (p->is_write) return ignore_write(vcpu, p); - p->regval = vcpu_read_sys_reg(vcpu, ACTLR_EL1); - return true; -} + p->regval = read_sysreg(actlr_el1); -static void reset_actlr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r) -{ - __vcpu_sys_reg(vcpu, ACTLR_EL1) = read_sysreg(actlr_el1); + if (p->aarch32) { + if (r->Op2 & 2) + p->regval = upper_32_bit(p->regval); + else + p->regval = lower_32_bit(p->regval); + } + + return true; } /* @@ -40,13 +43,13 @@ static void reset_actlr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r) * Important: Must be sorted ascending by Op0, Op1, CRn, CRm, Op2 */ static const struct sys_reg_desc genericv8_sys_regs[] = { - { SYS_DESC(SYS_ACTLR_EL1), access_actlr, reset_actlr, ACTLR_EL1 }, + { SYS_DESC(SYS_ACTLR_EL1), access_actlr, }, }; static const struct sys_reg_desc genericv8_cp15_regs[] = { /* ACTLR */ - { Op1(0b000), CRn(0b0001), CRm(0b0000), Op2(0b001), - access_actlr }, + { Op1(0b000), CRn(0b0001), CRm(0b0000), Op2(0b001), access_actlr }, + { Op1(0b000), CRn(0b0001), CRm(0b0000), Op2(0b011), access_actlr }, }; static struct kvm_sys_reg_target_table genericv8_target_table = { Thanks, M.
diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h index 32c8a675e5a4..5b7538663a8e 100644 --- a/arch/arm64/include/asm/kvm_host.h +++ b/arch/arm64/include/asm/kvm_host.h @@ -185,6 +185,7 @@ enum vcpu_sysreg { #define c0_CSSELR (CSSELR_EL1 * 2)/* Cache Size Selection Register */ #define c1_SCTLR (SCTLR_EL1 * 2) /* System Control Register */ #define c1_ACTLR (ACTLR_EL1 * 2) /* Auxiliary Control Register */ +#define c1_ACTLR2 (c1_ACTLR + 1) /* ACTLR top 32 bits */ #define c1_CPACR (CPACR_EL1 * 2) /* Coprocessor Access Control */ #define c2_TTBR0 (TTBR0_EL1 * 2) /* Translation Table Base Register 0 */ #define c2_TTBR0_high (c2_TTBR0 + 1) /* TTBR0 top 32 bits */ diff --git a/arch/arm64/kvm/sys_regs_generic_v8.c b/arch/arm64/kvm/sys_regs_generic_v8.c index 9cb6b4c8355a..ed77bbb48e64 100644 --- a/arch/arm64/kvm/sys_regs_generic_v8.c +++ b/arch/arm64/kvm/sys_regs_generic_v8.c @@ -30,6 +30,18 @@ static bool access_actlr(struct kvm_vcpu *vcpu, return true; } +static bool access_cp15_actlr(struct kvm_vcpu *vcpu, + struct sys_reg_params *p, + const struct sys_reg_desc *r) +{ + if (p->is_write) + return ignore_write(vcpu, p); + + p->regval = vcpu_cp15(vcpu, r->reg); + return true; + +} + static void reset_actlr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r) { __vcpu_sys_reg(vcpu, ACTLR_EL1) = read_sysreg(actlr_el1); @@ -46,7 +58,9 @@ static const struct sys_reg_desc genericv8_sys_regs[] = { static const struct sys_reg_desc genericv8_cp15_regs[] = { /* ACTLR */ { Op1(0b000), CRn(0b0001), CRm(0b0000), Op2(0b001), - access_actlr }, + access_cp15_actlr, NULL, c1_ACTLR }, + { Op1(0b000), CRn(0b0001), CRm(0b0000), Op2(0b011), + access_cp15_actlr, NULL, c1_ACTLR2 }, }; static struct kvm_sys_reg_target_table genericv8_target_table = {
ACTLR_EL1 is a 64bit register while the 32bit ACTLR is obviously 32bit. For 32bit software, the extra bits are accessible via ACTLR2... which KVM doesn't emulate. Signed-off-by: James Morse <james.morse@arm.com> --- I'm not convinced this is endian safe, but it does match what kvm_inject_undef32() do. The alternative would be to always read the 64bit value, and generate the 32bit offets like access_vm_reg() does. arch/arm64/include/asm/kvm_host.h | 1 + arch/arm64/kvm/sys_regs_generic_v8.c | 16 +++++++++++++++- 2 files changed, 16 insertions(+), 1 deletion(-)