| Message ID | 20210203133138.10754-10-kostap@marvell.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Device tree fixes for Armada family | expand |
Hi Kosta, śr., 3 lut 2021 o 14:32 <kostap@marvell.com> napisał(a): > > From: Stefan Chulski <stefanc@marvell.com> > > Enavble PCIe dma coherence for A3700 platform > While at it, can we also add: --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi @@ -71,6 +71,7 @@ soc { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <2>; + dma-coherent; ranges; internal-regs@d0000000 { so that to enable it for all bus-attached interfaces? This safe and will boost IO performance. Thanks, Marcin > Signed-off-by: Stefan Chulski <stefanc@marvell.com> > Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> > --- > arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi > index d5b6c0a1c54a..5c0df06bc707 100644 > --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi > +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi > @@ -486,6 +486,7 @@ > #interrupt-cells = <1>; > msi-parent = <&pcie0>; > msi-controller; > + dma-coherent; > ranges = <0x82000000 0 0xe8000000 0 0xe8000000 0 0x1000000 /* Port 0 MEM */ > 0x81000000 0 0xe9000000 0 0xe9000000 0 0x10000>; /* Port 0 IO*/ > interrupt-map-mask = <0 0 0 7>; > -- > 2.17.1 >
diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi index d5b6c0a1c54a..5c0df06bc707 100644 --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi @@ -486,6 +486,7 @@ #interrupt-cells = <1>; msi-parent = <&pcie0>; msi-controller; + dma-coherent; ranges = <0x82000000 0 0xe8000000 0 0xe8000000 0 0x1000000 /* Port 0 MEM */ 0x81000000 0 0xe9000000 0 0xe9000000 0 0x10000>; /* Port 0 IO*/ interrupt-map-mask = <0 0 0 7>;