diff mbox series

memory: samsung: exynos5422-dmc: handle clk_set_parent() failure

Message ID 20210407154535.70756-1-krzysztof.kozlowski@canonical.com (mailing list archive)
State New, archived
Headers show
Series memory: samsung: exynos5422-dmc: handle clk_set_parent() failure | expand

Commit Message

Krzysztof Kozlowski April 7, 2021, 3:45 p.m. UTC
clk_set_parent() can fail and ignoring such case could lead to invalid
clock setup for given frequency.

Addresses-Coverity: Unchecked return value
Fixes: 6e7674c3c6df ("memory: Add DMC driver for Exynos5422")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
 drivers/memory/samsung/exynos5422-dmc.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

Comments

Lukasz Luba April 7, 2021, 3:56 p.m. UTC | #1
Hi Krzysztof,

On 4/7/21 4:45 PM, Krzysztof Kozlowski wrote:
> clk_set_parent() can fail and ignoring such case could lead to invalid
> clock setup for given frequency.
> 
> Addresses-Coverity: Unchecked return value
> Fixes: 6e7674c3c6df ("memory: Add DMC driver for Exynos5422")
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
> ---
>   drivers/memory/samsung/exynos5422-dmc.c | 4 +++-
>   1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/memory/samsung/exynos5422-dmc.c b/drivers/memory/samsung/exynos5422-dmc.c
> index 56f6e65d40cd..9c8318923ed0 100644
> --- a/drivers/memory/samsung/exynos5422-dmc.c
> +++ b/drivers/memory/samsung/exynos5422-dmc.c
> @@ -1293,7 +1293,9 @@ static int exynos5_dmc_init_clks(struct exynos5_dmc *dmc)
>   
>   	dmc->curr_volt = target_volt;
>   
> -	clk_set_parent(dmc->mout_mx_mspll_ccore, dmc->mout_spll);
> +	ret = clk_set_parent(dmc->mout_mx_mspll_ccore, dmc->mout_spll);
> +	if (ret)
> +		return ret;
>   
>   	clk_prepare_enable(dmc->fout_bpll);
>   	clk_prepare_enable(dmc->mout_bpll);
> 

Thanks for running these tests and for the patch.
I've checked how many many places this function is used in the kernel
and return is ignored - in a lot of places...

This patch LGTM.

Reviewed-by: Lukasz Luba <lukasz.luba@arm.com>

Regards,
Lukasz
Krzysztof Kozlowski April 13, 2021, 2:58 p.m. UTC | #2
On Wed, 7 Apr 2021 17:45:35 +0200, Krzysztof Kozlowski wrote:
> clk_set_parent() can fail and ignoring such case could lead to invalid
> clock setup for given frequency.

Applied, thanks!

[1/1] memory: samsung: exynos5422-dmc: handle clk_set_parent() failure
      commit: 132c17c3ff878c7beaba51bdd275d5cc654c0e33

Best regards,
diff mbox series

Patch

diff --git a/drivers/memory/samsung/exynos5422-dmc.c b/drivers/memory/samsung/exynos5422-dmc.c
index 56f6e65d40cd..9c8318923ed0 100644
--- a/drivers/memory/samsung/exynos5422-dmc.c
+++ b/drivers/memory/samsung/exynos5422-dmc.c
@@ -1293,7 +1293,9 @@  static int exynos5_dmc_init_clks(struct exynos5_dmc *dmc)
 
 	dmc->curr_volt = target_volt;
 
-	clk_set_parent(dmc->mout_mx_mspll_ccore, dmc->mout_spll);
+	ret = clk_set_parent(dmc->mout_mx_mspll_ccore, dmc->mout_spll);
+	if (ret)
+		return ret;
 
 	clk_prepare_enable(dmc->fout_bpll);
 	clk_prepare_enable(dmc->mout_bpll);