| Message ID | 20220421175657.1259024-3-sean.anderson@seco.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | nvmem: sfp: binding updates and additions | expand |
Am 2022-04-21 19:56, schrieb Sean Anderson: > To program fuses, it is necessary to set the fuse programming time. > This > is determined based on the value of the platform clock. Add a clock > property. For some context: Sean was adding the SFP support in u-boot and I referred him to this binding. I didn't need the clock to just read the data. But Sean is right, we need the clock for the programming. I was unaware of that. The binding is still yet to be released with v5.18, thus I think it is still possible to make the clock mandatory. > Signed-off-by: Sean Anderson <sean.anderson@seco.com> Fixes: 6f9817cdcc82 ("dt-bindings: nvmem: add fsl,layerscape-sfp binding") -michael > --- > > .../bindings/nvmem/fsl,layerscape-sfp.yaml | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git > a/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml > b/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml > index b7798e903191..54086f50157d 100644 > --- a/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml > +++ b/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml > @@ -24,15 +24,29 @@ properties: > reg: > maxItems: 1 > > + clocks: > + maxItems: 1 > + description: > + The SFP clock. Typically, this is the platform clock divided by > 4. > + > + clock-names: > + const: sfp > + > required: > - compatible > - reg > + - clock-names > + - clocks > > unevaluatedProperties: false > > examples: > - | > + #include <dt-bindings/clock/fsl,qoriq-clockgen.h> > efuse@1e80000 { > compatible = "fsl,ls1028a-sfp"; > reg = <0x1e80000 0x8000>; > + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL > + QORIQ_CLK_PLL_DIV(4)>; > + clock-names = "sfp"; > };
On Thu, 21 Apr 2022 13:56:51 -0400, Sean Anderson wrote: > To program fuses, it is necessary to set the fuse programming time. This > is determined based on the value of the platform clock. Add a clock > property. > > Signed-off-by: Sean Anderson <sean.anderson@seco.com> > --- > > .../bindings/nvmem/fsl,layerscape-sfp.yaml | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > Running 'make dtbs_check' with the schema in this patch gives the following warnings. Consider if they are expected or the schema is incorrect. These may not be new warnings. Note that it is not yet a requirement to have 0 warnings for dtbs_check. This will change in the future. Full log is available here: https://patchwork.ozlabs.org/patch/ efuse@1e80000: 'clock-names' is a required property arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-kbox-a-230-ls.dtb arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dtb arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var1.dtb arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var2.dtb arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dtb arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var4.dtb arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dtb arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dtb efuse@1e80000: 'clocks' is a required property arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-kbox-a-230-ls.dtb arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dtb arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var1.dtb arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var2.dtb arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dtb arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var4.dtb arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dtb arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dtb
On 4/22/22 9:36 AM, Rob Herring wrote: > On Thu, 21 Apr 2022 13:56:51 -0400, Sean Anderson wrote: >> To program fuses, it is necessary to set the fuse programming time. This >> is determined based on the value of the platform clock. Add a clock >> property. >> >> Signed-off-by: Sean Anderson <sean.anderson@seco.com> >> --- >> >> .../bindings/nvmem/fsl,layerscape-sfp.yaml | 14 ++++++++++++++ >> 1 file changed, 14 insertions(+) >> > > Running 'make dtbs_check' with the schema in this patch gives the > following warnings. Consider if they are expected or the schema is > incorrect. These may not be new warnings. > > Note that it is not yet a requirement to have 0 warnings for dtbs_check. > This will change in the future. > > Full log is available here: https://patchwork.ozlabs.org/patch/ > > > efuse@1e80000: 'clock-names' is a required property > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-kbox-a-230-ls.dtb > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dtb > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var1.dtb > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var2.dtb > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dtb > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var4.dtb > arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dtb > arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dtb > > efuse@1e80000: 'clocks' is a required property > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-kbox-a-230-ls.dtb > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dtb > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var1.dtb > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var2.dtb > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dtb > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var4.dtb > arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dtb > arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dtb > This is fixed in 4/8, but I have ordered dt bindings changes first as required by Documentation/devicetree/bindings/submitting-patches.html --Sean
On Thu, Apr 21, 2022 at 08:12:34PM +0200, Michael Walle wrote: > Am 2022-04-21 19:56, schrieb Sean Anderson: > > To program fuses, it is necessary to set the fuse programming time. This > > is determined based on the value of the platform clock. Add a clock > > property. > > For some context: Sean was adding the SFP support in u-boot and > I referred him to this binding. I didn't need the clock to just > read the data. But Sean is right, we need the clock for the > programming. I was unaware of that. The binding is still yet to > be released with v5.18, thus I think it is still possible to make > the clock mandatory. Please add this detail to the commit message. Otherwise, it looks like an ABI break to make a new property required. > > > Signed-off-by: Sean Anderson <sean.anderson@seco.com> > > Fixes: 6f9817cdcc82 ("dt-bindings: nvmem: add fsl,layerscape-sfp binding") > > -michael > > > --- > > > > .../bindings/nvmem/fsl,layerscape-sfp.yaml | 14 ++++++++++++++ > > 1 file changed, 14 insertions(+) > > > > diff --git > > a/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml > > b/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml > > index b7798e903191..54086f50157d 100644 > > --- a/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml > > +++ b/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml > > @@ -24,15 +24,29 @@ properties: > > reg: > > maxItems: 1 > > > > + clocks: > > + maxItems: 1 > > + description: > > + The SFP clock. Typically, this is the platform clock divided by > > 4. > > + > > + clock-names: > > + const: sfp > > + > > required: > > - compatible > > - reg > > + - clock-names > > + - clocks > > > > unevaluatedProperties: false > > > > examples: > > - | > > + #include <dt-bindings/clock/fsl,qoriq-clockgen.h> > > efuse@1e80000 { > > compatible = "fsl,ls1028a-sfp"; > > reg = <0x1e80000 0x8000>; > > + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL > > + QORIQ_CLK_PLL_DIV(4)>; > > + clock-names = "sfp"; > > };
diff --git a/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml b/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml index b7798e903191..54086f50157d 100644 --- a/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml +++ b/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml @@ -24,15 +24,29 @@ properties: reg: maxItems: 1 + clocks: + maxItems: 1 + description: + The SFP clock. Typically, this is the platform clock divided by 4. + + clock-names: + const: sfp + required: - compatible - reg + - clock-names + - clocks unevaluatedProperties: false examples: - | + #include <dt-bindings/clock/fsl,qoriq-clockgen.h> efuse@1e80000 { compatible = "fsl,ls1028a-sfp"; reg = <0x1e80000 0x8000>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(4)>; + clock-names = "sfp"; };
To program fuses, it is necessary to set the fuse programming time. This is determined based on the value of the platform clock. Add a clock property. Signed-off-by: Sean Anderson <sean.anderson@seco.com> --- .../bindings/nvmem/fsl,layerscape-sfp.yaml | 14 ++++++++++++++ 1 file changed, 14 insertions(+)