| Message ID | 20220421175657.1259024-4-sean.anderson@seco.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | nvmem: sfp: binding updates and additions | expand |
On Thu, Apr 21, 2022 at 01:56:52PM -0400, Sean Anderson wrote: > The TA_PROG_SFP supply must be enabled to program the fuses, and > disabled to read the fuses (such as at power-on-reset). On many boards, > this supply is controlled by a jumper. The user must manually insert or > remove it at the appropriate time in the programming process. However, > on other boards this supply is controlled by and FPGA or a GPIO. In > these cases, the driver can automatically enabled and disable it as > necessary. > > Signed-off-by: Sean Anderson <sean.anderson@seco.com> > --- > > .../devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml b/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml > index 54086f50157d..e7d1232fcd41 100644 > --- a/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml > +++ b/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml > @@ -32,6 +32,11 @@ properties: > clock-names: > const: sfp > > + ta-prog-sfp-supply: > + description: > + The TA_PROG_SFP supply. It will be enabled for programming and disabled > + for reading. > + Doesn't there need to be some indication what this is? Is it a GPIO, or maybe a regulator? Andrew
Hi Andrew, On 4/21/22 5:59 PM, Andrew Lunn wrote: > On Thu, Apr 21, 2022 at 01:56:52PM -0400, Sean Anderson wrote: >> The TA_PROG_SFP supply must be enabled to program the fuses, and >> disabled to read the fuses (such as at power-on-reset). On many boards, >> this supply is controlled by a jumper. The user must manually insert or >> remove it at the appropriate time in the programming process. However, >> on other boards this supply is controlled by and FPGA or a GPIO. In >> these cases, the driver can automatically enabled and disable it as >> necessary. >> >> Signed-off-by: Sean Anderson <sean.anderson@seco.com> >> --- >> >> .../devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml | 5 +++++ >> 1 file changed, 5 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml b/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml >> index 54086f50157d..e7d1232fcd41 100644 >> --- a/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml >> +++ b/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml >> @@ -32,6 +32,11 @@ properties: >> clock-names: >> const: sfp >> >> + ta-prog-sfp-supply: >> + description: >> + The TA_PROG_SFP supply. It will be enabled for programming and disabled >> + for reading. >> + > > Doesn't there need to be some indication what this is? Is it a GPIO, > or maybe a regulator? There is a pin on these processors named "TA_PROG_SFP". The supply here should be for whatever regulator supplies that pin. So it could be a fixed-regulator or perhaps a sub-node of the board's FPGA (no such node exists yet, but it certainly could). There's a pattern property under Documentation/devicetree/bindings/regulator/regulator.yaml for these sorts of nodes. --Sean
On Thu, Apr 21, 2022 at 06:06:39PM -0400, Sean Anderson wrote: > Hi Andrew, > > On 4/21/22 5:59 PM, Andrew Lunn wrote: > > On Thu, Apr 21, 2022 at 01:56:52PM -0400, Sean Anderson wrote: > >> The TA_PROG_SFP supply must be enabled to program the fuses, and > >> disabled to read the fuses (such as at power-on-reset). On many boards, > >> this supply is controlled by a jumper. The user must manually insert or > >> remove it at the appropriate time in the programming process. However, > >> on other boards this supply is controlled by and FPGA or a GPIO. In > >> these cases, the driver can automatically enabled and disable it as > >> necessary. > >> > >> Signed-off-by: Sean Anderson <sean.anderson@seco.com> > >> --- > >> > >> .../devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml | 5 +++++ > >> 1 file changed, 5 insertions(+) > >> > >> diff --git a/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml b/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml > >> index 54086f50157d..e7d1232fcd41 100644 > >> --- a/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml > >> +++ b/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml > >> @@ -32,6 +32,11 @@ properties: > >> clock-names: > >> const: sfp > >> > >> + ta-prog-sfp-supply: > >> + description: > >> + The TA_PROG_SFP supply. It will be enabled for programming and disabled > >> + for reading. > >> + > > > > Doesn't there need to be some indication what this is? Is it a GPIO, > > or maybe a regulator? > > There is a pin on these processors named "TA_PROG_SFP". The supply here should > be for whatever regulator supplies that pin. So it could be a fixed-regulator > or perhaps a sub-node of the board's FPGA (no such node exists yet, but it > certainly could). There's a pattern property under > Documentation/devicetree/bindings/regulator/regulator.yaml for these sorts > of nodes. Ah, so -supply means regulator. I would spell it out for dumb people like my: ta-prog-sfp-supply: description: The regulator supplying TA_PROG_SFP. It will be enabled for programming and disabled for reading. Andrew
diff --git a/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml b/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml index 54086f50157d..e7d1232fcd41 100644 --- a/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml +++ b/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml @@ -32,6 +32,11 @@ properties: clock-names: const: sfp + ta-prog-sfp-supply: + description: + The TA_PROG_SFP supply. It will be enabled for programming and disabled + for reading. + required: - compatible - reg
The TA_PROG_SFP supply must be enabled to program the fuses, and disabled to read the fuses (such as at power-on-reset). On many boards, this supply is controlled by a jumper. The user must manually insert or remove it at the appropriate time in the programming process. However, on other boards this supply is controlled by and FPGA or a GPIO. In these cases, the driver can automatically enabled and disable it as necessary. Signed-off-by: Sean Anderson <sean.anderson@seco.com> --- .../devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml | 5 +++++ 1 file changed, 5 insertions(+)