diff mbox series

[1/6] arm64: don't override idmap t0sz

Message ID 20220518031725.3128044-2-anshuman.khandual@arm.com (mailing list archive)
State New, archived
Headers show
Series arm64/head: Cleanups for __create_page_tables() | expand

Commit Message

Anshuman Khandual May 18, 2022, 3:17 a.m. UTC 
From: Mark Rutland <mark.rutland@arm.com>

When the kernel is built with CONFIG_ARM64_VA_BITS_52, __cpu_setup will
override `idmap_t0sz`, and program TCR_EL1.T0SZ based on
`vabits_actual`. This is inconsistent with cpu_set_idmap_tcr_t0sz(),
which will use `idmap_t0sz`, but happens to work as
CONFIG_ARM64_VA_BITS_52 requires 64K pages where 48-bit VAs and 52-bit
VAs required the same number of page table levels and TTBR0 addresses
grow upwards from the base of the PGD table (for which the entire page
is zeroed).

When switching away from the idmap, cpu_set_default_tcr_t0sz() will use
`vabits_actual`, and so the T0SZ value used for the idmap does not have
to match the T0SZ used during regular kernel/userspace execution.

This patch ensures we *always* use `idmap_t0sz` as the TCR_EL1.T0SZ
value used while the idmap is active.

Cc: Ard Biesheuvel <ardb@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
---
 arch/arm64/mm/proc.S | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

Comments

Ard Biesheuvel May 18, 2022, 6:41 a.m. UTC | #1 
On Wed, 18 May 2022 at 05:17, Anshuman Khandual
<anshuman.khandual@arm.com> wrote:
>
> From: Mark Rutland <mark.rutland@arm.com>
>
> When the kernel is built with CONFIG_ARM64_VA_BITS_52, __cpu_setup will
> override `idmap_t0sz`, and program TCR_EL1.T0SZ based on
> `vabits_actual`. This is inconsistent with cpu_set_idmap_tcr_t0sz(),
> which will use `idmap_t0sz`, but happens to work as
> CONFIG_ARM64_VA_BITS_52 requires 64K pages where 48-bit VAs and 52-bit
> VAs required the same number of page table levels and TTBR0 addresses
> grow upwards from the base of the PGD table (for which the entire page
> is zeroed).
>
> When switching away from the idmap, cpu_set_default_tcr_t0sz() will use
> `vabits_actual`, and so the T0SZ value used for the idmap does not have
> to match the T0SZ used during regular kernel/userspace execution.
>
> This patch ensures we *always* use `idmap_t0sz` as the TCR_EL1.T0SZ
> value used while the idmap is active.
>
> Cc: Ard Biesheuvel <ardb@kernel.org>
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Will Deacon <will@kernel.org>
> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>

Acked-by: Ard Biesheuvel <ardb@kernel.org>

Note that this conflicts [trivially] with my series here:
https://lore.kernel.org/linux-arm-kernel/20220411094824.4176877-1-ardb@kernel.org/


> ---
>  arch/arm64/mm/proc.S | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S
> index 50bbed947bec..c1f76bf3276c 100644
> --- a/arch/arm64/mm/proc.S
> +++ b/arch/arm64/mm/proc.S
> @@ -468,9 +468,8 @@ SYM_FUNC_START(__cpu_setup)
>         sub             x9, xzr, x9
>         add             x9, x9, #64
>         tcr_set_t1sz    tcr, x9
> -#else
> -       ldr_l           x9, idmap_t0sz
>  #endif
> +       ldr_l           x9, idmap_t0sz
>         tcr_set_t0sz    tcr, x9
>
>         /*
> --
> 2.20.1
>
diff mbox series

Patch

diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S
index 50bbed947bec..c1f76bf3276c 100644
--- a/arch/arm64/mm/proc.S
+++ b/arch/arm64/mm/proc.S
@@ -468,9 +468,8 @@  SYM_FUNC_START(__cpu_setup)
 	sub		x9, xzr, x9
 	add		x9, x9, #64
 	tcr_set_t1sz	tcr, x9
-#else
-	ldr_l		x9, idmap_t0sz
 #endif
+	ldr_l		x9, idmap_t0sz
 	tcr_set_t0sz	tcr, x9
 
 	/*