| Message ID | 20220707132500.1708020-1-michael@walle.cc (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2,1/2] ARM: dts: lan966x: add clock gating register | expand |
On 07.07.2022 16:24, Michael Walle wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > The clock controller supports an optional clock gating register. This is > necessary to expose the USB device clock, for example. Add it. > > Signed-off-by: Michael Walle <michael@walle.cc> Applied to at91-dt, thanks! > --- > changes since v1: > - none > > arch/arm/boot/dts/lan966x.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi > index 57cb67a180ec..bc102677ff91 100644 > --- a/arch/arm/boot/dts/lan966x.dtsi > +++ b/arch/arm/boot/dts/lan966x.dtsi > @@ -65,7 +65,7 @@ clks: clock-controller@e00c00a8 { > #clock-cells = <1>; > clocks = <&cpu_clk>, <&ddr_clk>, <&sys_clk>; > clock-names = "cpu", "ddr", "sys"; > - reg = <0xe00c00a8 0x38>; > + reg = <0xe00c00a8 0x38>, <0xe00c02cc 0x4>; > }; > > timer { > -- > 2.30.2 >
Hi, Michael, On 11.07.2022 10:15, Claudiu Beznea - M18063 wrote: > On 07.07.2022 16:24, Michael Walle wrote: >> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe >> >> The clock controller supports an optional clock gating register. This is >> necessary to expose the USB device clock, for example. Add it. >> >> Signed-off-by: Michael Walle <michael@walle.cc> > > Applied to at91-dt, thanks! Actually, I will postpone this until [1] is accepted as current driver may fail if this patch is applied. Thank you, Claudiu Beznea [1] https://patchwork.kernel.org/project/linux-usb/patch/20220704102845.168438-2-herve.codina@bootlin.com > >> --- >> changes since v1: >> - none >> >> arch/arm/boot/dts/lan966x.dtsi | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi >> index 57cb67a180ec..bc102677ff91 100644 >> --- a/arch/arm/boot/dts/lan966x.dtsi >> +++ b/arch/arm/boot/dts/lan966x.dtsi >> @@ -65,7 +65,7 @@ clks: clock-controller@e00c00a8 { >> #clock-cells = <1>; >> clocks = <&cpu_clk>, <&ddr_clk>, <&sys_clk>; >> clock-names = "cpu", "ddr", "sys"; >> - reg = <0xe00c00a8 0x38>; >> + reg = <0xe00c00a8 0x38>, <0xe00c02cc 0x4>; >> }; >> >> timer { >> -- >> 2.30.2 >> >
Hi Claudiu, Am 2022-07-12 09:22, schrieb Claudiu.Beznea@microchip.com: > On 11.07.2022 10:15, Claudiu Beznea - M18063 wrote: >> On 07.07.2022 16:24, Michael Walle wrote: >>> EXTERNAL EMAIL: Do not click links or open attachments unless you >>> know the content is safe >>> >>> The clock controller supports an optional clock gating register. This >>> is >>> necessary to expose the USB device clock, for example. Add it. >>> >>> Signed-off-by: Michael Walle <michael@walle.cc> >> >> Applied to at91-dt, thanks! > > Actually, I will postpone this until [1] is accepted as current driver > may > fail if this patch is applied. Which was picked today :) -michael
On 19.07.2022 16:24, Michael Walle wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the > content is safe > > Hi Claudiu, > > Am 2022-07-12 09:22, schrieb Claudiu.Beznea@microchip.com: >> On 11.07.2022 10:15, Claudiu Beznea - M18063 wrote: >>> On 07.07.2022 16:24, Michael Walle wrote: >>>> EXTERNAL EMAIL: Do not click links or open attachments unless you >>>> know the content is safe >>>> >>>> The clock controller supports an optional clock gating register. This >>>> is >>>> necessary to expose the USB device clock, for example. Add it. >>>> >>>> Signed-off-by: Michael Walle <michael@walle.cc> >>> >>> Applied to at91-dt, thanks! >> >> Actually, I will postpone this until [1] is accepted as current driver >> may >> fail if this patch is applied. > > Which was picked today :) Yes. It's on at91-dt again, thanks! > > -michael
diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi index 57cb67a180ec..bc102677ff91 100644 --- a/arch/arm/boot/dts/lan966x.dtsi +++ b/arch/arm/boot/dts/lan966x.dtsi @@ -65,7 +65,7 @@ clks: clock-controller@e00c00a8 { #clock-cells = <1>; clocks = <&cpu_clk>, <&ddr_clk>, <&sys_clk>; clock-names = "cpu", "ddr", "sys"; - reg = <0xe00c00a8 0x38>; + reg = <0xe00c00a8 0x38>, <0xe00c02cc 0x4>; }; timer {
The clock controller supports an optional clock gating register. This is necessary to expose the USB device clock, for example. Add it. Signed-off-by: Michael Walle <michael@walle.cc> --- changes since v1: - none arch/arm/boot/dts/lan966x.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)