| Message ID | 20230728082952.959212-10-maz@kernel.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | KVM: arm64: NV trap forwarding infrastructure | expand |
On 2023/7/28 16:29, Marc Zyngier wrote: > From: Mark Brown <broonie@kernel.org> > > In order to allow us to have shared code for managing fine grained traps > for KVM guests add it as a detected feature rather than relying on it > being a dependency of other features. > > Acked-by: Catalin Marinas <catalin.marinas@arm.com> > Reviewed-by: Eric Auger <eric.auger@redhat.com> > Signed-off-by: Mark Brown <broonie@kernel.org> > [maz: converted to ARM64_CPUID_FIELDS()] > Signed-off-by: Marc Zyngier <maz@kernel.org> > Link: https://lore.kernel.org/r/20230301-kvm-arm64-fgt-v4-1-1bf8d235ac1f@kernel.org > --- > arch/arm64/kernel/cpufeature.c | 7 +++++++ > arch/arm64/tools/cpucaps | 1 + > 2 files changed, 8 insertions(+) Reviewed-by: Zenghui Yu <yuzenghui@huawei.com>
Hi Marc, > On 28 Jul 2023, at 08:29, Marc Zyngier <maz@kernel.org> wrote: > > From: Mark Brown <broonie@kernel.org> > > In order to allow us to have shared code for managing fine grained traps > for KVM guests add it as a detected feature rather than relying on it > being a dependency of other features. > > Acked-by: Catalin Marinas <catalin.marinas@arm.com> > Reviewed-by: Eric Auger <eric.auger@redhat.com> > Signed-off-by: Mark Brown <broonie@kernel.org> > [maz: converted to ARM64_CPUID_FIELDS()] > Signed-off-by: Marc Zyngier <maz@kernel.org> > Link: https://lore.kernel.org/r/20230301-kvm-arm64-fgt-v4-1-1bf8d235ac1f@kernel.org > --- > arch/arm64/kernel/cpufeature.c | 7 +++++++ > arch/arm64/tools/cpucaps | 1 + > 2 files changed, 8 insertions(+) > > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c > index f9d456fe132d..668e2872a086 100644 > --- a/arch/arm64/kernel/cpufeature.c > +++ b/arch/arm64/kernel/cpufeature.c > @@ -2627,6 +2627,13 @@ static const struct arm64_cpu_capabilities arm64_features[] = { > .matches = has_cpuid_feature, > ARM64_CPUID_FIELDS(ID_AA64ISAR1_EL1, LRCPC, IMP) > }, > + { > + .desc = "Fine Grained Traps", > + .type = ARM64_CPUCAP_SYSTEM_FEATURE, > + .capability = ARM64_HAS_FGT, > + .matches = has_cpuid_feature, > + ARM64_CPUID_FIELDS(ID_AA64MMFR0_EL1, FGT, IMP) > + }, > #ifdef CONFIG_ARM64_SME > { > .desc = "Scalable Matrix Extension", > diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps > index c80ed4f3cbce..c3f06fdef609 100644 > --- a/arch/arm64/tools/cpucaps > +++ b/arch/arm64/tools/cpucaps > @@ -26,6 +26,7 @@ HAS_ECV > HAS_ECV_CNTPOFF > HAS_EPAN > HAS_EVT > +HAS_FGT Reviewed-by: Miguel Luis <miguel.luis@oracle.com> Thanks Miguel > HAS_GENERIC_AUTH > HAS_GENERIC_AUTH_ARCH_QARMA3 > HAS_GENERIC_AUTH_ARCH_QARMA5 > -- > 2.34.1 >
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index f9d456fe132d..668e2872a086 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -2627,6 +2627,13 @@ static const struct arm64_cpu_capabilities arm64_features[] = { .matches = has_cpuid_feature, ARM64_CPUID_FIELDS(ID_AA64ISAR1_EL1, LRCPC, IMP) }, + { + .desc = "Fine Grained Traps", + .type = ARM64_CPUCAP_SYSTEM_FEATURE, + .capability = ARM64_HAS_FGT, + .matches = has_cpuid_feature, + ARM64_CPUID_FIELDS(ID_AA64MMFR0_EL1, FGT, IMP) + }, #ifdef CONFIG_ARM64_SME { .desc = "Scalable Matrix Extension", diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps index c80ed4f3cbce..c3f06fdef609 100644 --- a/arch/arm64/tools/cpucaps +++ b/arch/arm64/tools/cpucaps @@ -26,6 +26,7 @@ HAS_ECV HAS_ECV_CNTPOFF HAS_EPAN HAS_EVT +HAS_FGT HAS_GENERIC_AUTH HAS_GENERIC_AUTH_ARCH_QARMA3 HAS_GENERIC_AUTH_ARCH_QARMA5