| Message ID | 20230915021509.25773-8-quic_tengfan@quicinc.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | soc: qcom: Add uart console support for SM4450 | expand |
On 15/09/2023 04:15, Tengfei Fan wrote: > From: Ajit Pandey <quic_ajipan@quicinc.com> > > Add device node for RPMH and Global clock controller on Qualcomm > SM4450 platform. > > Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com> > Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> Warnings in your code: sm4450-qrd.dtb: clock-controller@100000: clocks: [[28, 0], [29]] is too short Best regards, Krzysztof
在 9/15/2023 3:22 PM, Krzysztof Kozlowski 写道: > On 15/09/2023 04:15, Tengfei Fan wrote: >> From: Ajit Pandey <quic_ajipan@quicinc.com> >> >> Add device node for RPMH and Global clock controller on Qualcomm >> SM4450 platform. >> >> Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com> >> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> > > Warnings in your code: > sm4450-qrd.dtb: clock-controller@100000: clocks: [[28, 0], [29]] is too > short > > > > Best regards, > Krzysztof > Hi Krzyszrof, Want to know how did you find this warning? I cannot find this warning when I do dt check(make ARCH=arm64 DT_CHECKER_FLAGS=-m dtbs_check) or kernel compile(make -j8 ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- Image.gz dtbs modules).
On 18/09/2023 12:34, Tengfei Fan wrote: > > > 在 9/15/2023 3:22 PM, Krzysztof Kozlowski 写道: >> On 15/09/2023 04:15, Tengfei Fan wrote: >>> From: Ajit Pandey <quic_ajipan@quicinc.com> >>> >>> Add device node for RPMH and Global clock controller on Qualcomm >>> SM4450 platform. >>> >>> Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com> >>> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> >> >> Warnings in your code: >> sm4450-qrd.dtb: clock-controller@100000: clocks: [[28, 0], [29]] is too >> short >> >> >> >> Best regards, >> Krzysztof >> > Hi Krzyszrof, > Want to know how did you find this warning? > I cannot find this warning when I do dt check(make ARCH=arm64 > DT_CHECKER_FLAGS=-m dtbs_check) or kernel compile(make -j8 ARCH=arm64 > CROSS_COMPILE=aarch64-linux-gnu- Image.gz dtbs modules). > I just applied dependencies and these patches, and run dtbs_check. Best regards, Krzysztof
diff --git a/arch/arm64/boot/dts/qcom/sm4450.dtsi b/arch/arm64/boot/dts/qcom/sm4450.dtsi index 0d1d39197d77..df59027a2f93 100644 --- a/arch/arm64/boot/dts/qcom/sm4450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm4450.dtsi @@ -3,6 +3,8 @@ * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. */ +#include <dt-bindings/clock/qcom,rpmh.h> +#include <dt-bindings/clock/qcom,sm4450-gcc.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/soc/qcom,rpmh-rsc.h> @@ -367,6 +369,22 @@ apps_bcm_voter: bcm-voter { compatible = "qcom,bcm-voter"; }; + + rpmhcc: clock-controller { + compatible = "qcom,sm4450-rpmh-clk"; + #clock-cells = <1>; + clock-names = "xo"; + clocks = <&xo_board>; + }; + }; + + gcc: clock-controller@100000 { + compatible = "qcom,sm4450-gcc"; + reg = <0x0 0x00100000 0x0 0x1f4200>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + clocks = <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>; }; tcsr_mutex: hwlock@1f40000 {