| Message ID | 20231206100503.564090-3-tabba@google.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | KVM: arm64: Fixes to fine grain traps and pKVM traps | expand |
On Wed, Dec 06, 2023 at 10:04:52AM +0000, Fuad Tabba wrote: > +#define SYS_GCSCR_EL1 sys_reg(3, 0, 2, 5, 0) > +#define SYS_GCSPR_EL1 sys_reg(3, 0, 2, 5, 1) > +#define SYS_GCSCRE0_EL1 sys_reg(3, 0, 2, 5, 2) > + > +#define SYS_GCSPR_EL0 sys_reg(3, 3, 2, 5, 1) > + Unless there's some complication with representing them (mainly register layouts that aren't representable with the language or *very* repetitive blocks of registers) we should be adding any new sysregs to the sysreg file rather than manually encoding them. We're trying to move things out of sysreg.h as much as possible. For the above you can pick up the patch from my GCS series: https://lore.kernel.org/linux-arm-kernel/20231122-arm64-gcs-v7-6-201c483bd775@kernel.org/ > @@ -412,6 +423,8 @@ > #define SYS_PMUSERENR_EL0 sys_reg(3, 3, 9, 14, 0) > #define SYS_PMOVSSET_EL0 sys_reg(3, 3, 9, 14, 3) > > +#define SYS_POR_EL0 sys_reg(3, 3, 10, 2, 4) > + This is in Joey's POR series: https://lore.kernel.org/linux-arm-kernel/20231124163510.1835740-2-joey.gouly@arm.com/ Unfortunately I'm not aware of anyone having already done the rest.
Hi Mark, On Thu, Dec 7, 2023 at 5:06 PM Mark Brown <broonie@kernel.org> wrote: > > On Wed, Dec 06, 2023 at 10:04:52AM +0000, Fuad Tabba wrote: > > > +#define SYS_GCSCR_EL1 sys_reg(3, 0, 2, 5, 0) > > +#define SYS_GCSPR_EL1 sys_reg(3, 0, 2, 5, 1) > > +#define SYS_GCSCRE0_EL1 sys_reg(3, 0, 2, 5, 2) > > + > > > +#define SYS_GCSPR_EL0 sys_reg(3, 3, 2, 5, 1) > > + > > Unless there's some complication with representing them (mainly register > layouts that aren't representable with the language or *very* repetitive > blocks of registers) we should be adding any new sysregs to the sysreg > file rather than manually encoding them. We're trying to move things > out of sysreg.h as much as possible. I thought that we're still using the encoded ones if we're not using the fields of the registers. That said, I'll move to the generated one in the respin. > > For the above you can pick up the patch from my GCS series: > > https://lore.kernel.org/linux-arm-kernel/20231122-arm64-gcs-v7-6-201c483bd775@kernel.org/ > > > @@ -412,6 +423,8 @@ > > #define SYS_PMUSERENR_EL0 sys_reg(3, 3, 9, 14, 0) > > #define SYS_PMOVSSET_EL0 sys_reg(3, 3, 9, 14, 3) > > > > +#define SYS_POR_EL0 sys_reg(3, 3, 10, 2, 4) > > + > > This is in Joey's POR series: > > https://lore.kernel.org/linux-arm-kernel/20231124163510.1835740-2-joey.gouly@arm.com/ > > Unfortunately I'm not aware of anyone having already done the rest. I'll pick up what you and Joey have done and add the rest. Thanks, /fuad
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 5e65f51c10d2..7b469b3ac1f9 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -297,6 +297,10 @@ #define SYS_APGAKEYLO_EL1 sys_reg(3, 0, 2, 3, 0) #define SYS_APGAKEYHI_EL1 sys_reg(3, 0, 2, 3, 1) +#define SYS_GCSCR_EL1 sys_reg(3, 0, 2, 5, 0) +#define SYS_GCSPR_EL1 sys_reg(3, 0, 2, 5, 1) +#define SYS_GCSCRE0_EL1 sys_reg(3, 0, 2, 5, 2) + #define SYS_SPSR_EL1 sys_reg(3, 0, 4, 0, 0) #define SYS_ELR_EL1 sys_reg(3, 0, 4, 0, 1) @@ -356,7 +360,11 @@ #define SYS_PMMIR_EL1 sys_reg(3, 0, 9, 14, 6) #define SYS_MAIR_EL1 sys_reg(3, 0, 10, 2, 0) +#define SYS_MAIR2_EL1 sys_reg(3, 0, 10, 2, 1) +#define SYS_POR_EL1 sys_reg(3, 0, 10, 2, 4) +#define SYS_S2POR_EL1 sys_reg(3, 0, 10, 2, 5) #define SYS_AMAIR_EL1 sys_reg(3, 0, 10, 3, 0) +#define SYS_AMAIR2_EL1 sys_reg(3, 0, 10, 3, 1) #define SYS_VBAR_EL1 sys_reg(3, 0, 12, 0, 0) #define SYS_DISR_EL1 sys_reg(3, 0, 12, 1, 1) @@ -390,6 +398,7 @@ #define SYS_ICC_IGRPEN1_EL1 sys_reg(3, 0, 12, 12, 7) #define SYS_ACCDATA_EL1 sys_reg(3, 0, 13, 0, 5) +#define SYS_RCWMASK_EL1 sys_reg(3, 0, 13, 0, 6) #define SYS_CNTKCTL_EL1 sys_reg(3, 0, 14, 1, 0) @@ -398,6 +407,8 @@ #define SYS_RNDR_EL0 sys_reg(3, 3, 2, 4, 0) #define SYS_RNDRRS_EL0 sys_reg(3, 3, 2, 4, 1) +#define SYS_GCSPR_EL0 sys_reg(3, 3, 2, 5, 1) + #define SYS_PMCR_EL0 sys_reg(3, 3, 9, 12, 0) #define SYS_PMCNTENSET_EL0 sys_reg(3, 3, 9, 12, 1) #define SYS_PMCNTENCLR_EL0 sys_reg(3, 3, 9, 12, 2) @@ -412,6 +423,8 @@ #define SYS_PMUSERENR_EL0 sys_reg(3, 3, 9, 14, 0) #define SYS_PMOVSSET_EL0 sys_reg(3, 3, 9, 14, 3) +#define SYS_POR_EL0 sys_reg(3, 3, 10, 2, 4) + #define SYS_TPIDR_EL0 sys_reg(3, 3, 13, 0, 2) #define SYS_TPIDRRO_EL0 sys_reg(3, 3, 13, 0, 3) #define SYS_TPIDR2_EL0 sys_reg(3, 3, 13, 0, 5) diff --git a/arch/arm64/kvm/emulate-nested.c b/arch/arm64/kvm/emulate-nested.c index 06185216a297..8b473a1bbc11 100644 --- a/arch/arm64/kvm/emulate-nested.c +++ b/arch/arm64/kvm/emulate-nested.c @@ -1042,10 +1042,20 @@ enum fg_filter_id { static const struct encoding_to_trap_config encoding_to_fgt[] __initconst = { /* HFGRTR_EL2, HFGWTR_EL2 */ + SR_FGT(SYS_AMAIR2_EL1, HFGxTR, nAMAIR2_EL1, 0), + SR_FGT(SYS_MAIR2_EL1, HFGxTR, nMAIR2_EL1, 0), + SR_FGT(SYS_S2POR_EL1, HFGxTR, nS2POR_EL1, 0), + SR_FGT(SYS_POR_EL1, HFGxTR, nPOR_EL1, 0), + SR_FGT(SYS_POR_EL0, HFGxTR, nPOR_EL0, 0), SR_FGT(SYS_PIR_EL1, HFGxTR, nPIR_EL1, 0), SR_FGT(SYS_PIRE0_EL1, HFGxTR, nPIRE0_EL1, 0), + SR_FGT(SYS_RCWMASK_EL1, HFGxTR, nRCWMASK_EL1, 0), SR_FGT(SYS_TPIDR2_EL0, HFGxTR, nTPIDR2_EL0, 0), SR_FGT(SYS_SMPRI_EL1, HFGxTR, nSMPRI_EL1, 0), + SR_FGT(SYS_GCSCR_EL1, HFGxTR, nGCS_EL1, 0), + SR_FGT(SYS_GCSPR_EL1, HFGxTR, nGCS_EL1, 0), + SR_FGT(SYS_GCSCRE0_EL1, HFGxTR, nGCS_EL0, 0), + SR_FGT(SYS_GCSPR_EL0, HFGxTR, nGCS_EL0, 0), SR_FGT(SYS_ACCDATA_EL1, HFGxTR, nACCDATA_EL1, 0), SR_FGT(SYS_ERXADDR_EL1, HFGxTR, ERXADDR_EL1, 1), SR_FGT(SYS_ERXPFGCDN_EL1, HFGxTR, ERXPFGCDN_EL1, 1),
Add the missing nested virt FGT table entries HFGxTR_EL2. Based on the 2023-09 Arm Architecture System Registers xml specification [*]. Also adds definitions of some of the missing system registers, which can be trapped by the FGT bits. [*] https://developer.arm.com/downloads/-/exploration-tools Signed-off-by: Fuad Tabba <tabba@google.com> --- arch/arm64/include/asm/sysreg.h | 13 +++++++++++++ arch/arm64/kvm/emulate-nested.c | 10 ++++++++++ 2 files changed, 23 insertions(+)