| Message ID | 20240401153740.123978-10-krzk@kernel.org (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | [RFT,01/10] arm64: dts: microchip: sparx5: fix mdio reg | expand |
Hi Krzysztof, On Mon, 2024-04-01 at 17:37 +0200, Krzysztof Kozlowski wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > Since beginning the DTS extended the SPI0 in two places adding two SPI > muxes, each with same SPI NOR flash. Both used exactly the same > chip-selects, so this was clearly buggy code. Without checking in > datasheet, assume device has only one SPI NOR flash, so code was > duplicated. > > Fixes dtc W=1 warnings: > > sparx5_pcb135_board.dtsi:92.10-96.4: Warning (unique_unit_address_if_enabled): > /axi@600000000/spi@600104000/flash@0: duplicate unit-address (also used in node > /axi@600000000/spi@600104000/spi@0) > > Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> > > --- > > Not tested on hardware > --- > .../boot/dts/microchip/sparx5_pcb135_board.dtsi | 16 ---------------- > 1 file changed, 16 deletions(-) > > diff --git a/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi > b/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi > index 20016efb3656..d64e642e3873 100644 > --- a/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi > +++ b/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi > @@ -96,22 +96,6 @@ flash@0 { > }; > }; > > -&spi0 { > - status = "okay"; > - spi@0 { > - compatible = "spi-mux"; > - mux-controls = <&mux>; > - #address-cells = <1>; > - #size-cells = <0>; > - reg = <0>; /* CS0 */ > - flash@9 { > - compatible = "jedec,spi-nor"; > - spi-max-frequency = <8000000>; > - reg = <0x9>; /* SPI */ > - }; > - }; > -}; > - I also tested this, and no surprise: same comment as for the pcb134 patch... > &sgpio1 { > status = "okay"; > microchip,sgpio-port-ranges = <24 31>; > -- > 2.34.1 > Best Regards Steen
On 05/04/2024 14:11, Steen Hegelund wrote: >> >> -&spi0 { >> - status = "okay"; >> - spi@0 { >> - compatible = "spi-mux"; >> - mux-controls = <&mux>; >> - #address-cells = <1>; >> - #size-cells = <0>; >> - reg = <0>; /* CS0 */ >> - flash@9 { >> - compatible = "jedec,spi-nor"; >> - spi-max-frequency = <8000000>; >> - reg = <0x9>; /* SPI */ >> - }; >> - }; >> -}; >> - > > I also tested this, and no surprise: same comment as for the pcb134 patch... Thanks, I will send v2. Best regards, Krzysztof
diff --git a/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi b/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi index 20016efb3656..d64e642e3873 100644 --- a/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi +++ b/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi @@ -96,22 +96,6 @@ flash@0 { }; }; -&spi0 { - status = "okay"; - spi@0 { - compatible = "spi-mux"; - mux-controls = <&mux>; - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; /* CS0 */ - flash@9 { - compatible = "jedec,spi-nor"; - spi-max-frequency = <8000000>; - reg = <0x9>; /* SPI */ - }; - }; -}; - &sgpio1 { status = "okay"; microchip,sgpio-port-ranges = <24 31>;
Since beginning the DTS extended the SPI0 in two places adding two SPI muxes, each with same SPI NOR flash. Both used exactly the same chip-selects, so this was clearly buggy code. Without checking in datasheet, assume device has only one SPI NOR flash, so code was duplicated. Fixes dtc W=1 warnings: sparx5_pcb135_board.dtsi:92.10-96.4: Warning (unique_unit_address_if_enabled): /axi@600000000/spi@600104000/flash@0: duplicate unit-address (also used in node /axi@600000000/spi@600104000/spi@0) Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> --- Not tested on hardware --- .../boot/dts/microchip/sparx5_pcb135_board.dtsi | 16 ---------------- 1 file changed, 16 deletions(-)