| Message ID | 463dbc60de944f4e0400dcdc190c983cf0d208e8.1552594551.git-series.maxime.ripard@bootlin.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | ARM: dts: sunxi: Cleanup DTC warnings | expand |
On Fri, Mar 15, 2019 at 4:16 AM Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > The soc node in the A80 DTSI has a ranges property, but no matching unit > address, which results in a DTC warning. Add the unit address to remove > that warning. > > Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> > --- > arch/arm/boot/dts/sun9i-a80.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi > index 9b15f272e5f5..7a495c84ab65 100644 > --- a/arch/arm/boot/dts/sun9i-a80.dtsi > +++ b/arch/arm/boot/dts/sun9i-a80.dtsi > @@ -289,7 +289,7 @@ > status = "disabled"; > }; > > - soc { > + soc@20000 { I thought we didn't like the soc node having an address? Maybe we just bite the bullet and use 64-bit addresses and sizes for the A80? ChenYu
On Fri, Mar 15, 2019 at 10:39:24AM +0800, Chen-Yu Tsai wrote: > On Fri, Mar 15, 2019 at 4:16 AM Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > > > The soc node in the A80 DTSI has a ranges property, but no matching unit > > address, which results in a DTC warning. Add the unit address to remove > > that warning. > > > > Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> > > --- > > arch/arm/boot/dts/sun9i-a80.dtsi | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi > > index 9b15f272e5f5..7a495c84ab65 100644 > > --- a/arch/arm/boot/dts/sun9i-a80.dtsi > > +++ b/arch/arm/boot/dts/sun9i-a80.dtsi > > @@ -289,7 +289,7 @@ > > status = "disabled"; > > }; > > > > - soc { > > + soc@20000 { > > I thought we didn't like the soc node having an address? In general, yes, but in general we also don't have a ranges property. > Maybe we just bite the bullet and use 64-bit addresses and sizes for > the A80? I'd rather not, the current layout of the DT is pretty nice. But now I'm thinking, do you remember why we need to do that mapping in the first place? It's a 32bits SoCs, so why do we need to care about 64 bits addresses? Maxime
On Fri, Mar 15, 2019 at 5:02 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > On Fri, Mar 15, 2019 at 10:39:24AM +0800, Chen-Yu Tsai wrote: > > On Fri, Mar 15, 2019 at 4:16 AM Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > > > > > The soc node in the A80 DTSI has a ranges property, but no matching unit > > > address, which results in a DTC warning. Add the unit address to remove > > > that warning. > > > > > > Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> > > > --- > > > arch/arm/boot/dts/sun9i-a80.dtsi | 2 +- > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > > > diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi > > > index 9b15f272e5f5..7a495c84ab65 100644 > > > --- a/arch/arm/boot/dts/sun9i-a80.dtsi > > > +++ b/arch/arm/boot/dts/sun9i-a80.dtsi > > > @@ -289,7 +289,7 @@ > > > status = "disabled"; > > > }; > > > > > > - soc { > > > + soc@20000 { > > > > I thought we didn't like the soc node having an address? > > In general, yes, but in general we also don't have a ranges property. > > > Maybe we just bite the bullet and use 64-bit addresses and sizes for > > the A80? > > I'd rather not, the current layout of the DT is pretty nice. > > But now I'm thinking, do you remember why we need to do that mapping > in the first place? It's a 32bits SoCs, so why do we need to care > about 64 bits addresses? It supports LPAE, addressing up to 8GB of RAM. Not that I've seen a board sporting that much RAM though. Theobroma Systems might have had such a board though, as their product page says "up to 8GB RAM". ChenYu
On Fri, Mar 15, 2019 at 05:09:22PM +0800, Chen-Yu Tsai wrote: > On Fri, Mar 15, 2019 at 5:02 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > > > On Fri, Mar 15, 2019 at 10:39:24AM +0800, Chen-Yu Tsai wrote: > > > On Fri, Mar 15, 2019 at 4:16 AM Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > > > > > > > The soc node in the A80 DTSI has a ranges property, but no matching unit > > > > address, which results in a DTC warning. Add the unit address to remove > > > > that warning. > > > > > > > > Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> > > > > --- > > > > arch/arm/boot/dts/sun9i-a80.dtsi | 2 +- > > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > > > > > diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi > > > > index 9b15f272e5f5..7a495c84ab65 100644 > > > > --- a/arch/arm/boot/dts/sun9i-a80.dtsi > > > > +++ b/arch/arm/boot/dts/sun9i-a80.dtsi > > > > @@ -289,7 +289,7 @@ > > > > status = "disabled"; > > > > }; > > > > > > > > - soc { > > > > + soc@20000 { > > > > > > I thought we didn't like the soc node having an address? > > > > In general, yes, but in general we also don't have a ranges property. > > > > > Maybe we just bite the bullet and use 64-bit addresses and sizes for > > > the A80? > > > > I'd rather not, the current layout of the DT is pretty nice. > > > > But now I'm thinking, do you remember why we need to do that mapping > > in the first place? It's a 32bits SoCs, so why do we need to care > > about 64 bits addresses? > > It supports LPAE, addressing up to 8GB of RAM. Not that I've seen a > board sporting that much RAM though. Theobroma Systems might have > had such a board though, as their product page says "up to 8GB RAM". Ah, right. What should we do about this patch then? Maxime
On Fri, Mar 15, 2019 at 5:16 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > On Fri, Mar 15, 2019 at 05:09:22PM +0800, Chen-Yu Tsai wrote: > > On Fri, Mar 15, 2019 at 5:02 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > > > > > On Fri, Mar 15, 2019 at 10:39:24AM +0800, Chen-Yu Tsai wrote: > > > > On Fri, Mar 15, 2019 at 4:16 AM Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > > > > > > > > > The soc node in the A80 DTSI has a ranges property, but no matching unit > > > > > address, which results in a DTC warning. Add the unit address to remove > > > > > that warning. > > > > > > > > > > Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> > > > > > --- > > > > > arch/arm/boot/dts/sun9i-a80.dtsi | 2 +- > > > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > > > > > > > diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi > > > > > index 9b15f272e5f5..7a495c84ab65 100644 > > > > > --- a/arch/arm/boot/dts/sun9i-a80.dtsi > > > > > +++ b/arch/arm/boot/dts/sun9i-a80.dtsi > > > > > @@ -289,7 +289,7 @@ > > > > > status = "disabled"; > > > > > }; > > > > > > > > > > - soc { > > > > > + soc@20000 { > > > > > > > > I thought we didn't like the soc node having an address? > > > > > > In general, yes, but in general we also don't have a ranges property. > > > > > > > Maybe we just bite the bullet and use 64-bit addresses and sizes for > > > > the A80? > > > > > > I'd rather not, the current layout of the DT is pretty nice. > > > > > > But now I'm thinking, do you remember why we need to do that mapping > > > in the first place? It's a 32bits SoCs, so why do we need to care > > > about 64 bits addresses? > > > > It supports LPAE, addressing up to 8GB of RAM. Not that I've seen a > > board sporting that much RAM though. Theobroma Systems might have > > had such a board though, as their product page says "up to 8GB RAM". > > Ah, right. What should we do about this patch then? I'm OK with it I suppose. AFAICT only sysfs paths and overlays (which should use labels instead) are affected. ChenYu
On Fri, Mar 15, 2019 at 06:22:44PM +0800, Chen-Yu Tsai wrote: > On Fri, Mar 15, 2019 at 5:16 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > > > On Fri, Mar 15, 2019 at 05:09:22PM +0800, Chen-Yu Tsai wrote: > > > On Fri, Mar 15, 2019 at 5:02 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > > > > > > > On Fri, Mar 15, 2019 at 10:39:24AM +0800, Chen-Yu Tsai wrote: > > > > > On Fri, Mar 15, 2019 at 4:16 AM Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > > > > > > > > > > > The soc node in the A80 DTSI has a ranges property, but no matching unit > > > > > > address, which results in a DTC warning. Add the unit address to remove > > > > > > that warning. > > > > > > > > > > > > Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> > > > > > > --- > > > > > > arch/arm/boot/dts/sun9i-a80.dtsi | 2 +- > > > > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > > > > > > > > > diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi > > > > > > index 9b15f272e5f5..7a495c84ab65 100644 > > > > > > --- a/arch/arm/boot/dts/sun9i-a80.dtsi > > > > > > +++ b/arch/arm/boot/dts/sun9i-a80.dtsi > > > > > > @@ -289,7 +289,7 @@ > > > > > > status = "disabled"; > > > > > > }; > > > > > > > > > > > > - soc { > > > > > > + soc@20000 { > > > > > > > > > > I thought we didn't like the soc node having an address? > > > > > > > > In general, yes, but in general we also don't have a ranges property. > > > > > > > > > Maybe we just bite the bullet and use 64-bit addresses and sizes for > > > > > the A80? > > > > > > > > I'd rather not, the current layout of the DT is pretty nice. > > > > > > > > But now I'm thinking, do you remember why we need to do that mapping > > > > in the first place? It's a 32bits SoCs, so why do we need to care > > > > about 64 bits addresses? > > > > > > It supports LPAE, addressing up to 8GB of RAM. Not that I've seen a > > > board sporting that much RAM though. Theobroma Systems might have > > > had such a board though, as their product page says "up to 8GB RAM". > > > > Ah, right. What should we do about this patch then? > > I'm OK with it I suppose. AFAICT only sysfs paths and overlays (which should > use labels instead) are affected. We can always revert it if there's any fallouts, but we did it already on a number of other SoCs (well, the opposite actually, dropping the unit address), and it wasn't an issue. Maxime
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi index 9b15f272e5f5..7a495c84ab65 100644 --- a/arch/arm/boot/dts/sun9i-a80.dtsi +++ b/arch/arm/boot/dts/sun9i-a80.dtsi @@ -289,7 +289,7 @@ status = "disabled"; }; - soc { + soc@20000 { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>;
The soc node in the A80 DTSI has a ranges property, but no matching unit address, which results in a DTC warning. Add the unit address to remove that warning. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> --- arch/arm/boot/dts/sun9i-a80.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)