| Message ID | 58a7d91cab20b924784fb5a09e16ca08e6f13318.1352608333.git.viresh.kumar@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Sun, Nov 11, 2012 at 5:39 AM, Viresh Kumar <viresh.kumar@linaro.org> wrote: > From: Shiraz Hashim <shiraz.hashim@st.com> > > SPEAr platform provides a provision to control chipselects of ARM PL022 Prime > Cell spi controller through its system registers, which otherwise remains under > PL022 control which some protocols do not want. So I guess this platform us utilizing the cs_control field of the PL022 platform data to do the actual magic, right? > This patch adds spics controller nodes in device tree for various SPEAr13xx > SoCs. > > Cc: Linus Walleij <linus.walleij@linaro.org> > Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> > Reviewed-by: Vipin Kumar <vipin.kumar@st.com> > Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> (...) > ahb { > + spics: spics@e0700000{ > + compatible = "st,spear-spics-gpio"; > + reg = <0xe0700000 0x1000>; > + st-spics,peripcfg-reg = <0x3b0>; > + st-spics,sw-enable-bit = <12>; > + st-spics,cs-value-bit = <11>; > + st-spics,cs-enable-mask = <3>; > + st-spics,cs-enable-shift = <8>; > + gpio-controller; > + #gpio-cells = <2>; > + }; > + Are these bindings documented? Apart from that remark: Acked-by: Linus Walleij <linus.walleij@linaro.org> Yours, Linus Walleij
On Nov 13, 2012 7:38 PM, "Linus Walleij" <linus.walleij@linaro.org> wrote: > > On Sun, Nov 11, 2012 at 5:39 AM, Viresh Kumar <viresh.kumar@linaro.org> wrote: > > > From: Shiraz Hashim <shiraz.hashim@st.com> > > > > SPEAr platform provides a provision to control chipselects of ARM PL022 Prime > > Cell spi controller through its system registers, which otherwise remains under > > PL022 control which some protocols do not want. > > So I guess this platform us utilizing the cs_control field of the > PL022 platform data to do the actual magic, right? Correct. > > This patch adds spics controller nodes in device tree for various SPEAr13xx > > SoCs. > > > > Cc: Linus Walleij <linus.walleij@linaro.org> > > Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> > > Reviewed-by: Vipin Kumar <vipin.kumar@st.com> > > Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> > (...) > > ahb { > > + spics: spics@e0700000{ > > + compatible = "st,spear-spics-gpio"; > > + reg = <0xe0700000 0x1000>; > > + st-spics,peripcfg-reg = <0x3b0>; > > + st-spics,sw-enable-bit = <12>; > > + st-spics,cs-value-bit = <11>; > > + st-spics,cs-enable-mask = <3>; > > + st-spics,cs-enable-shift = <8>; > > + gpio-controller; > > + #gpio-cells = <2>; > > + }; > > + > > Are these bindings documented? The main patch waiting for ur comments is 1/14. > Apart from that remark: > Acked-by: Linus Walleij <linus.walleij@linaro.org> > > Yours, > Linus Walleij
On Tue, Nov 13, 2012 at 3:34 PM, Viresh Kumar <viresh.kumar@linaro.org> wrote: > On Nov 13, 2012 7:38 PM, "Linus Walleij" <linus.walleij@linaro.org> wrote: >> On Sun, Nov 11, 2012 at 5:39 AM, Viresh Kumar <viresh.kumar@linaro.org> >> wrote: >> > ahb { >> > + spics: spics@e0700000{ >> > + compatible = "st,spear-spics-gpio"; >> > + reg = <0xe0700000 0x1000>; >> > + st-spics,peripcfg-reg = <0x3b0>; >> > + st-spics,sw-enable-bit = <12>; >> > + st-spics,cs-value-bit = <11>; >> > + st-spics,cs-enable-mask = <3>; >> > + st-spics,cs-enable-shift = <8>; >> > + gpio-controller; >> > + #gpio-cells = <2>; >> > + }; >> > + >> >> Are these bindings documented? > > The main patch waiting for ur comments is 1/14. I seldom comment on individual DT bindings, I just want to know that they're there :-) Yours, Linus Walleij
On 15 November 2012 19:36, Linus Walleij <linus.walleij@linaro.org> wrote: >>> > ahb { >>> > + spics: spics@e0700000{ >>> > + compatible = "st,spear-spics-gpio"; >>> > + reg = <0xe0700000 0x1000>; >>> > + st-spics,peripcfg-reg = <0x3b0>; >>> > + st-spics,sw-enable-bit = <12>; >>> > + st-spics,cs-value-bit = <11>; >>> > + st-spics,cs-enable-mask = <3>; >>> > + st-spics,cs-enable-shift = <8>; >>> > + gpio-controller; >>> > + #gpio-cells = <2>; >>> > + }; >>> > + >>> >>> Are these bindings documented? >> >> The main patch waiting for ur comments is 1/14. > > I seldom comment on individual DT bindings, I just want > to know that they're there :-) Its not that simple. You are required to Ack it, as we have added it in drivers/pinctrl/spear because we are controlling pins here :) -- viresh
On Thu, Nov 15, 2012 at 3:08 PM, Viresh Kumar <viresh.kumar@linaro.org> wrote: > On 15 November 2012 19:36, Linus Walleij <linus.walleij@linaro.org> wrote: >> I seldom comment on individual DT bindings, I just want >> to know that they're there :-) > > Its not that simple. You are required to Ack it, as we have added it in > drivers/pinctrl/spear because we are controlling pins here :) Yeah I saw, I've commented on it now.. Yours, Linus Walleij
diff --git a/arch/arm/boot/dts/spear1310.dtsi b/arch/arm/boot/dts/spear1310.dtsi index 419ea74..d5661ee 100644 --- a/arch/arm/boot/dts/spear1310.dtsi +++ b/arch/arm/boot/dts/spear1310.dtsi @@ -17,6 +17,18 @@ compatible = "st,spear1310"; ahb { + spics: spics@e0700000{ + compatible = "st,spear-spics-gpio"; + reg = <0xe0700000 0x1000>; + st-spics,peripcfg-reg = <0x3b0>; + st-spics,sw-enable-bit = <12>; + st-spics,cs-value-bit = <11>; + st-spics,cs-enable-mask = <3>; + st-spics,cs-enable-shift = <8>; + gpio-controller; + #gpio-cells = <2>; + }; + ahci@b1000000 { compatible = "snps,spear-ahci"; reg = <0xb1000000 0x10000>; diff --git a/arch/arm/boot/dts/spear1340.dtsi b/arch/arm/boot/dts/spear1340.dtsi index d71fe2a..1604425 100644 --- a/arch/arm/boot/dts/spear1340.dtsi +++ b/arch/arm/boot/dts/spear1340.dtsi @@ -17,6 +17,20 @@ compatible = "st,spear1340"; ahb { + + spics: spics@e0700000{ + compatible = "st,spear-spics-gpio"; + reg = <0xe0700000 0x1000>; + st-spics,peripcfg-reg = <0x42c>; + st-spics,sw-enable-bit = <21>; + st-spics,cs-value-bit = <20>; + st-spics,cs-enable-mask = <3>; + st-spics,cs-enable-shift = <18>; + gpio-controller; + #gpio-cells = <2>; + status = "disabled"; + }; + ahci@b1000000 { compatible = "snps,spear-ahci"; reg = <0xb1000000 0x10000>;