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[v2,0/8] qcom: support wakeup capable GPIOs

Message ID 20190124202205.7940-1-ilina@codeaurora.org (mailing list archive)
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Series qcom: support wakeup capable GPIOs | expand

Message

Lina Iyer Jan. 24, 2019, 8:21 p.m. UTC
Hi all,

This is a bug fix submission of the v1 posted here [1]. The discussion on how
to represent the wakeup-parent interrupt controller is on-going [2] here. The
reiew comments in [1], from Doug and Stephen are addressed in this patch.

The series attempts to add GPIO chip in hierarchy with PDC interrupt controller
that can detect and wakeup the GPIOs routed to it, when the system is
suspend/deep sleep mode.

Changes in v2:
	- Fix bug related to unmasking PDC interrupt
	- Address review comments from Doug and Stepehn
	- Rebase on top of 5.0-rc2
	- Fix signed-off-by tags
	- Enable QCOM_PDC in defconfig
	
Do note that this patch uses the register address convention updated by Bjorn
per [3].

Thanks,
Lina

[1]. https://lkml.org/lkml/2018/12/19/807
[2]. https://lkml.org/lkml/2018/12/19/813
[3]. https://lkml.org/lkml/2019/1/17/924

Lina Iyer (7):
  irqdomain: add bus token DOMAIN_BUS_WAKEUP
  drivers: irqchip: add PDC irqdomain for wakeup capable GPIOs
  dt-bindings: sdm845-pinctrl: add wakeup interrupt parent for GPIO
  drivers: pinctrl: msm: setup GPIO irqchip hierarchy
  arm64: dts: qcom: add PDC interrupt controller for SDM845
  arm64: dts: qcom: setup PDC as wakeup parent for GPIOs for SDM845
  arm64: defconfig: enable PDC interrupt controller for Qualcomm SDM845

Thierry Reding (1):
  gpio: Add support for hierarchical IRQ domains

 .../bindings/pinctrl/qcom,sdm845-pinctrl.txt  |   7 +-
 arch/arm64/boot/dts/qcom/sdm845.dtsi          |  10 +
 arch/arm64/configs/defconfig                  |   1 +
 drivers/gpio/gpiolib.c                        |  15 +-
 drivers/irqchip/qcom-pdc.c                    | 204 +++++++++++++++++-
 drivers/pinctrl/qcom/pinctrl-msm.c            | 133 ++++++++++--
 include/linux/gpio/driver.h                   |   6 +
 include/linux/irqdomain.h                     |   1 +
 include/linux/soc/qcom/irq.h                  |  23 ++
 9 files changed, 371 insertions(+), 29 deletions(-)
 create mode 100644 include/linux/soc/qcom/irq.h

Comments

Linus Walleij Jan. 28, 2019, 2:17 p.m. UTC | #1
On Thu, Jan 24, 2019 at 9:22 PM Lina Iyer <ilina@codeaurora.org> wrote:

> This is a bug fix submission of the v1 posted here [1]. The discussion on how
> to represent the wakeup-parent interrupt controller is on-going [2] here. The
> reiew comments in [1], from Doug and Stephen are addressed in this patch.
>
> The series attempts to add GPIO chip in hierarchy with PDC interrupt controller
> that can detect and wakeup the GPIOs routed to it, when the system is
> suspend/deep sleep mode.

I kind of start to get the hang of this now. This is starting to
look finished. Some words on the hierarchical GPIO IRQs:

I have started to look into hierarchical GPIO+irqchip since
the usage of such is spreading.

I have been on to Thierry patches trying to make him implement
more generic helpers in the gpiolib irqchip library functions.

In short I see the following:

- Hierarchical gpiochips all have .alloc() and .translate() functions
  that look more or less the same.

- They all fall down to remapping either tuples or entire ranges
  of IRQs from parent to child with a linear look-up table on
  allocation.

So my idea would be to add support for this into the gpiolib
hierarchical irqchip helper: by supplying a parent irqdomain
and a list of translation tuples, we should be able to handle
pretty much any hierarchical GPIO irqdomain (famous last
words).

Right now I am converting the IXP4xx platform to hierarchical
IRQ from the ground up (it is not even using device tree
so it is a bit of a challenge) but it seems to be working.

So I will try to post this in some hopefully working form, and
on top of those changes or before them introduce some
helpers in the core for hierarchical irqs. Or I fail.

Anyways, I do not think my ambitions for refactoring the
helpers can stand in the way of support for these use cases
and new hardware, so maybe we need to merge a few
more hierarchical drivers just bypassing the gpiolib
helpers. I don't want to block development, and I suspect
Thierry might be getting annoyed at me at this point, so
we should maybe just pile up a few more hierarchical
chips so I can refactor them later.

What do you think?

Yours,
Linus Walleij
Lina Iyer Jan. 30, 2019, 5:03 p.m. UTC | #2
On Mon, Jan 28 2019 at 07:19 -0700, Linus Walleij wrote:
>On Thu, Jan 24, 2019 at 9:22 PM Lina Iyer <ilina@codeaurora.org> wrote:
>
>> This is a bug fix submission of the v1 posted here [1]. The discussion on how
>> to represent the wakeup-parent interrupt controller is on-going [2] here. The
>> reiew comments in [1], from Doug and Stephen are addressed in this patch.
>>
>> The series attempts to add GPIO chip in hierarchy with PDC interrupt controller
>> that can detect and wakeup the GPIOs routed to it, when the system is
>> suspend/deep sleep mode.
>
>I kind of start to get the hang of this now. This is starting to
>look finished. Some words on the hierarchical GPIO IRQs:
>
>I have started to look into hierarchical GPIO+irqchip since
>the usage of such is spreading.
>
>I have been on to Thierry patches trying to make him implement
>more generic helpers in the gpiolib irqchip library functions.
>
>In short I see the following:
>
>- Hierarchical gpiochips all have .alloc() and .translate() functions
>  that look more or less the same.
>
Yes.

>- They all fall down to remapping either tuples or entire ranges
>  of IRQs from parent to child with a linear look-up table on
>  allocation.
>
I would think this would be the generic case, unless its QCOM, where we
would want to push the tuples up hierarchy :(

>So my idea would be to add support for this into the gpiolib
>hierarchical irqchip helper: by supplying a parent irqdomain
>and a list of translation tuples, we should be able to handle
>pretty much any hierarchical GPIO irqdomain (famous last
>words).
>
We would read the tuples from DT? Also please consider Rob's idea of
specifying hierarchy from [2].

>Right now I am converting the IXP4xx platform to hierarchical
>IRQ from the ground up (it is not even using device tree
>so it is a bit of a challenge) but it seems to be working.
>
>So I will try to post this in some hopefully working form, and
>on top of those changes or before them introduce some
>helpers in the core for hierarchical irqs. Or I fail.
>
Thanks, please copy me on the thread. I would not want to miss this.

>Anyways, I do not think my ambitions for refactoring the
>helpers can stand in the way of support for these use cases
>and new hardware, so maybe we need to merge a few
>more hierarchical drivers just bypassing the gpiolib
>helpers. I don't want to block development, and I suspect
>Thierry might be getting annoyed at me at this point, so
>we should maybe just pile up a few more hierarchical
>chips so I can refactor them later.
>
>What do you think?
>
I attempted refactoring the .alloc and .translate and for a generic case
and it seemed like it would fit the bill very well. Will await your
patches.

Thanks,
Lina