| Message ID | 20210114191601.v7.1.I3ad184e3423d8e479bc3e86f5b393abb1704a1d1@changeid (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | a82e537807d5c85706cd4c16fd2de77a8495dc8d |
| Headers | show |
| Series | [v7,1/4] pinctrl: qcom: Allow SoCs to specify a GPIO function that's not 0 | expand |
On Fri, Jan 15, 2021 at 4:16 AM Douglas Anderson <dianders@chromium.org> wrote: > There's currently a comment in the code saying function 0 is GPIO. > Instead of hardcoding it, let's add a member where an SoC can specify > it. No known SoCs use a number other than 0, but this just makes the > code clearer. NOTE: no SoC code needs to be updated since we can rely > on zero-initialization. > > Signed-off-by: Douglas Anderson <dianders@chromium.org> > Reviewed-by: Stephen Boyd <swboyd@chromium.org> > Reviewed-by: Maulik Shah <mkshah@codeaurora.org> > Tested-by: Maulik Shah <mkshah@codeaurora.org> > Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Patches applied for fixes! Yours, Linus Walleij
Hello: This series was applied to qcom/linux.git (refs/heads/for-next): On Thu, 14 Jan 2021 19:16:21 -0800 you wrote: > There's currently a comment in the code saying function 0 is GPIO. > Instead of hardcoding it, let's add a member where an SoC can specify > it. No known SoCs use a number other than 0, but this just makes the > code clearer. NOTE: no SoC code needs to be updated since we can rely > on zero-initialization. > > Signed-off-by: Douglas Anderson <dianders@chromium.org> > Reviewed-by: Stephen Boyd <swboyd@chromium.org> > Reviewed-by: Maulik Shah <mkshah@codeaurora.org> > Tested-by: Maulik Shah <mkshah@codeaurora.org> > Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> > > [...] Here is the summary with links: - [v7,1/4] pinctrl: qcom: Allow SoCs to specify a GPIO function that's not 0 https://git.kernel.org/qcom/c/a82e537807d5 - [v7,2/4] pinctrl: qcom: No need to read-modify-write the interrupt status https://git.kernel.org/qcom/c/4079d35fa4fc - [v7,3/4] pinctrl: qcom: Properly clear "intr_ack_high" interrupts when unmasking https://git.kernel.org/qcom/c/a95881d6aa2c - [v7,4/4] pinctrl: qcom: Don't clear pending interrupts when enabling https://git.kernel.org/qcom/c/cf9d052aa600 You are awesome, thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/patchwork/pwbot.html
diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c index e051aecf95c4..d1261188fb6e 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.c +++ b/drivers/pinctrl/qcom/pinctrl-msm.c @@ -210,8 +210,7 @@ static int msm_pinmux_request_gpio(struct pinctrl_dev *pctldev, if (!g->nfuncs) return 0; - /* For now assume function 0 is GPIO because it always is */ - return msm_pinmux_set_mux(pctldev, g->funcs[0], offset); + return msm_pinmux_set_mux(pctldev, g->funcs[pctrl->soc->gpio_func], offset); } static const struct pinmux_ops msm_pinmux_ops = { diff --git a/drivers/pinctrl/qcom/pinctrl-msm.h b/drivers/pinctrl/qcom/pinctrl-msm.h index 333f99243c43..e31a5167c91e 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.h +++ b/drivers/pinctrl/qcom/pinctrl-msm.h @@ -118,6 +118,7 @@ struct msm_gpio_wakeirq_map { * @wakeirq_dual_edge_errata: If true then GPIOs using the wakeirq_map need * to be aware that their parent can't handle dual * edge interrupts. + * @gpio_func: Which function number is GPIO (usually 0). */ struct msm_pinctrl_soc_data { const struct pinctrl_pin_desc *pins; @@ -134,6 +135,7 @@ struct msm_pinctrl_soc_data { const struct msm_gpio_wakeirq_map *wakeirq_map; unsigned int nwakeirq_map; bool wakeirq_dual_edge_errata; + unsigned int gpio_func; }; extern const struct dev_pm_ops msm_pinctrl_dev_pm_ops;