| Message ID | 20210622141117.358893-6-angelogioacchino.delregno@somainline.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Implement SPM/SAW for MSM8998 and SDM6xx | expand |
On Tue, Jun 22, 2021 at 04:11:17PM +0200, AngeloGioacchino Del Regno wrote: > The driver was updated to add SAW2 v4.1 support for new SoCs: document > the new compatibles. Can't take patches without a S-o-b. Run checkpatch.pl, it points this out for you. > --- > .../bindings/soc/qcom/qcom,spm.yaml | 21 +++++++++++++++++++ > 1 file changed, 21 insertions(+) > > diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,spm.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,spm.yaml > index 4aaa319b2932..0faf52700dec 100644 > --- a/Documentation/devicetree/bindings/soc/qcom/qcom,spm.yaml > +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,spm.yaml > @@ -17,6 +17,10 @@ description: | > properties: > compatible: > enum: > + - qcom,sdm660-gold-saw2-v4.1-l2 > + - qcom,sdm660-silver-saw2-v4.1-l2 > + - qcom,msm8998-gold-saw2-v4.1-l2 > + - qcom,msm8998-silver-saw2-v4.1-l2 What's the difference between gold and silver? Are the h/w instances different (I realize the CPUs are) in some way? How does the OS use the different compatible strings? > - qcom,msm8974-saw2-v2.1-cpu > - qcom,apq8084-saw2-v2.1-cpu > - qcom,apq8064-saw2-v1.1-cpu > @@ -33,6 +37,8 @@ additionalProperties: false > > examples: > - | > + > + /* Example 1: SoC using SAW2 and kpss-acc-v2 CPUIdle */ > cpus { > #address-cells = <1>; > #size-cells = <0>; > @@ -52,4 +58,19 @@ examples: > reg = <0xf9089000 0x1000>; > }; > > + - | > + > + /* Example 2: New-gen multi cluster SoC using SAW only for L2; > + * This does not require any cpuidle driver, nor any cpu phandle. > + */ > + power-controller@17812000 { > + compatible = "qcom,msm8998-gold-saw2-v4.1-l2", "qcom,saw2"; > + reg = <0x17812000 0x1000>; > + }; > + > + power-controller@17912000 { > + compatible = "qcom,msm8998-silver-saw2-v4.1-l2", "qcom,saw2"; > + reg = <0x17912000 0x1000>; > + }; > + > ... > -- > 2.32.0 > >
Il 14/07/21 00:21, Rob Herring ha scritto: > On Tue, Jun 22, 2021 at 04:11:17PM +0200, AngeloGioacchino Del Regno wrote: >> The driver was updated to add SAW2 v4.1 support for new SoCs: document >> the new compatibles. > > Can't take patches without a S-o-b. Run checkpatch.pl, it points this > out for you. > I am truly sorry for missing my S-o-b. >> --- >> .../bindings/soc/qcom/qcom,spm.yaml | 21 +++++++++++++++++++ >> 1 file changed, 21 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,spm.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,spm.yaml >> index 4aaa319b2932..0faf52700dec 100644 >> --- a/Documentation/devicetree/bindings/soc/qcom/qcom,spm.yaml >> +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,spm.yaml >> @@ -17,6 +17,10 @@ description: | >> properties: >> compatible: >> enum: >> + - qcom,sdm660-gold-saw2-v4.1-l2 >> + - qcom,sdm660-silver-saw2-v4.1-l2 >> + - qcom,msm8998-gold-saw2-v4.1-l2 >> + - qcom,msm8998-silver-saw2-v4.1-l2 > > What's the difference between gold and silver? Are the h/w instances > different (I realize the CPUs are) in some way? How does the OS use the > different compatible strings? > They have different configuration parameters and the HW instances should be different indeed (at least from what I remember), plus they're always at different iostart. The driver is using the different compatible strings to choose which configuration gets written. You can also avoid writing the configuration to one of them or both (if you wish to lose capabilities given by this driver, perhaps also if you want to simply never use the gold cluster, for example). >> - qcom,msm8974-saw2-v2.1-cpu >> - qcom,apq8084-saw2-v2.1-cpu >> - qcom,apq8064-saw2-v1.1-cpu >> @@ -33,6 +37,8 @@ additionalProperties: false >> >> examples: >> - | >> + >> + /* Example 1: SoC using SAW2 and kpss-acc-v2 CPUIdle */ >> cpus { >> #address-cells = <1>; >> #size-cells = <0>; >> @@ -52,4 +58,19 @@ examples: >> reg = <0xf9089000 0x1000>; >> }; >> >> + - | >> + >> + /* Example 2: New-gen multi cluster SoC using SAW only for L2; >> + * This does not require any cpuidle driver, nor any cpu phandle. >> + */ >> + power-controller@17812000 { >> + compatible = "qcom,msm8998-gold-saw2-v4.1-l2", "qcom,saw2"; >> + reg = <0x17812000 0x1000>; >> + }; >> + >> + power-controller@17912000 { >> + compatible = "qcom,msm8998-silver-saw2-v4.1-l2", "qcom,saw2"; >> + reg = <0x17912000 0x1000>; >> + }; >> + >> ... >> -- >> 2.32.0 >> >>
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,spm.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,spm.yaml index 4aaa319b2932..0faf52700dec 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,spm.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,spm.yaml @@ -17,6 +17,10 @@ description: | properties: compatible: enum: + - qcom,sdm660-gold-saw2-v4.1-l2 + - qcom,sdm660-silver-saw2-v4.1-l2 + - qcom,msm8998-gold-saw2-v4.1-l2 + - qcom,msm8998-silver-saw2-v4.1-l2 - qcom,msm8974-saw2-v2.1-cpu - qcom,apq8084-saw2-v2.1-cpu - qcom,apq8064-saw2-v1.1-cpu @@ -33,6 +37,8 @@ additionalProperties: false examples: - | + + /* Example 1: SoC using SAW2 and kpss-acc-v2 CPUIdle */ cpus { #address-cells = <1>; #size-cells = <0>; @@ -52,4 +58,19 @@ examples: reg = <0xf9089000 0x1000>; }; + - | + + /* Example 2: New-gen multi cluster SoC using SAW only for L2; + * This does not require any cpuidle driver, nor any cpu phandle. + */ + power-controller@17812000 { + compatible = "qcom,msm8998-gold-saw2-v4.1-l2", "qcom,saw2"; + reg = <0x17812000 0x1000>; + }; + + power-controller@17912000 { + compatible = "qcom,msm8998-silver-saw2-v4.1-l2", "qcom,saw2"; + reg = <0x17912000 0x1000>; + }; + ...