diff mbox series

[v3,12/12] ARM: dts: qcom: apq8084: add clocks and clock-names to gcc device

Message ID 20230111060402.1168726-13-dmitry.baryshkov@linaro.org (mailing list archive)
State Accepted
Headers show
Series clock: qcom: apq8084: convert to parent_data/_hws | expand

Commit Message

Dmitry Baryshkov Jan. 11, 2023, 6:04 a.m. UTC 
Add clocks and clock-names nodes to the gcc device to bind clocks using
the DT links.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8084.dtsi | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

Comments

Stephen Boyd Jan. 25, 2023, 9:52 p.m. UTC | #1 
Quoting Dmitry Baryshkov (2023-01-10 22:04:02)
> diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi
> index 4b0d2b4f4b6a..4d01f0f2292e 100644
> --- a/arch/arm/boot/dts/qcom-apq8084.dtsi
> +++ b/arch/arm/boot/dts/qcom-apq8084.dtsi
> @@ -388,6 +388,24 @@ gcc: clock-controller@fc400000 {
>                         #reset-cells = <1>;
>                         #power-domain-cells = <1>;
>                         reg = <0xfc400000 0x4000>;
> +                       clocks = <&xo_board>,
> +                                <&sleep_clk>,
> +                                <0>, /* ufs */
> +                                <0>,
> +                                <0>,
> +                                <0>,
> +                                <0>, /* sata */
> +                                <0>,
> +                                <0>; /* pcie */
> +                       clock-names = "xo",

It just uses xo_board again though, so it's a no-op until someone
decides to change this to the RPM provided XO clk.
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi
index 4b0d2b4f4b6a..4d01f0f2292e 100644
--- a/arch/arm/boot/dts/qcom-apq8084.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8084.dtsi
@@ -388,6 +388,24 @@  gcc: clock-controller@fc400000 {
 			#reset-cells = <1>;
 			#power-domain-cells = <1>;
 			reg = <0xfc400000 0x4000>;
+			clocks = <&xo_board>,
+				 <&sleep_clk>,
+				 <0>, /* ufs */
+				 <0>,
+				 <0>,
+				 <0>,
+				 <0>, /* sata */
+				 <0>,
+				 <0>; /* pcie */
+			clock-names = "xo",
+				      "sleep_clk",
+				      "ufs_rx_symbol_0_clk_src",
+				      "ufs_rx_symbol_1_clk_src",
+				      "ufs_tx_symbol_0_clk_src",
+				      "ufs_tx_symbol_1_clk_src",
+				      "sata_asic0_clk",
+				      "sata_rx_clk",
+				      "pcie_pipe";
 		};
 
 		tcsr_mutex: hwlock@fd484000 {