| Message ID | 20230612092355.87937-24-brgl@bgdev.pl (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | arm64: qcom: sa8775p-ride: enable the first ethernet port | expand |
On 12.06.2023 11:23, Bartosz Golaszewski wrote: > From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > > Add the node for the first ethernet interface on sa8775p platforms. > > Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > --- > arch/arm64/boot/dts/qcom/sa8775p.dtsi | 30 +++++++++++++++++++++++++++ > 1 file changed, 30 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi > index 0e59000a0c82..f43a2a5d1d11 100644 > --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi > +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi > @@ -2315,6 +2315,36 @@ cpufreq_hw: cpufreq@18591000 { > > #freq-domain-cells = <1>; > }; > + > + ethernet0: ethernet@23040000 { > + compatible = "qcom,sa8775p-ethqos"; > + reg = <0x0 0x23040000 0x0 0x10000>, > + <0x0 0x23056000 0x0 0x100>; > + reg-names = "stmmaceth", "rgmii"; > + > + clocks = <&gcc GCC_EMAC0_AXI_CLK>, > + <&gcc GCC_EMAC0_SLV_AHB_CLK>, > + <&gcc GCC_EMAC0_PTP_CLK>, > + <&gcc GCC_EMAC0_PHY_AUX_CLK>; > + clock-names = "stmmaceth", "pclk", "ptp_ref", "phyaux"; Please make this a vertical list, one per line > + > + power-domains = <&gcc EMAC0_GDSC>; > + > + interrupts = <GIC_SPI 946 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "macirq"; And another nit, interrupts above clocks would match what I ask others to do.. Still working on checks/guidelines for this! Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > + > + phys = <&serdes_phy>; > + phy-names = "serdes"; > + > + iommus = <&apps_smmu 0x120 0xf>; > + > + snps,tso; > + snps,pbl = <32>; > + rx-fifo-depth = <16384>; > + tx-fifo-depth = <16384>; > + > + status = "disabled"; > + }; > }; > > arch_timer: timer {
diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi index 0e59000a0c82..f43a2a5d1d11 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -2315,6 +2315,36 @@ cpufreq_hw: cpufreq@18591000 { #freq-domain-cells = <1>; }; + + ethernet0: ethernet@23040000 { + compatible = "qcom,sa8775p-ethqos"; + reg = <0x0 0x23040000 0x0 0x10000>, + <0x0 0x23056000 0x0 0x100>; + reg-names = "stmmaceth", "rgmii"; + + clocks = <&gcc GCC_EMAC0_AXI_CLK>, + <&gcc GCC_EMAC0_SLV_AHB_CLK>, + <&gcc GCC_EMAC0_PTP_CLK>, + <&gcc GCC_EMAC0_PHY_AUX_CLK>; + clock-names = "stmmaceth", "pclk", "ptp_ref", "phyaux"; + + power-domains = <&gcc EMAC0_GDSC>; + + interrupts = <GIC_SPI 946 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "macirq"; + + phys = <&serdes_phy>; + phy-names = "serdes"; + + iommus = <&apps_smmu 0x120 0xf>; + + snps,tso; + snps,pbl = <32>; + rx-fifo-depth = <16384>; + tx-fifo-depth = <16384>; + + status = "disabled"; + }; }; arch_timer: timer {