| Message ID | 20230612092355.87937-27-brgl@bgdev.pl (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | arm64: qcom: sa8775p-ride: enable the first ethernet port | expand |
On 12.06.2023 11:23, Bartosz Golaszewski wrote: > From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > > Enable the first 1Gb ethernet port on sa8775p-ride development board. > > Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > --- I don't know a whole lot about this, but it passes bindings checks and looks good overall, so: Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > arch/arm64/boot/dts/qcom/sa8775p-ride.dts | 89 +++++++++++++++++++++++ > 1 file changed, 89 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts > index dbd9553aa5c7..13508271bca8 100644 > --- a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts > +++ b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts > @@ -261,6 +261,95 @@ vreg_l8e: ldo8 { > }; > }; > > +ðernet0 { > + phy-mode = "sgmii"; > + phy-handle = <&sgmii_phy>; > + phy-supply = <&vreg_l5a>; > + > + pinctrl-0 = <ðernet0_default>; > + pinctrl-names = "default"; > + > + snps,mtl-rx-config = <&mtl_rx_setup>; > + snps,mtl-tx-config = <&mtl_tx_setup>; > + snps,ps-speed = <1000>; > + > + status = "okay"; > + > + mdio { > + compatible = "snps,dwmac-mdio"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>; > + reset-delay-us = <11000>; > + reset-post-delay-us = <70000>; > + > + sgmii_phy: phy@8 { > + reg = <0x8>; > + device_type = "ethernet-phy"; > + }; > + }; > + > + mtl_rx_setup: rx-queues-config { > + snps,rx-queues-to-use = <4>; > + snps,rx-sched-sp; > + > + queue0 { > + snps,dcb-algorithm; > + snps,map-to-dma-channel = <0x0>; > + snps,route-up; > + snps,priority = <0x1>; > + }; > + > + queue1 { > + snps,dcb-algorithm; > + snps,map-to-dma-channel = <0x1>; > + snps,route-ptp; > + }; > + > + queue2 { > + snps,avb-algorithm; > + snps,map-to-dma-channel = <0x2>; > + snps,route-avcp; > + }; > + > + queue3 { > + snps,avb-algorithm; > + snps,map-to-dma-channel = <0x3>; > + snps,priority = <0xc>; > + }; > + }; > + > + mtl_tx_setup: tx-queues-config { > + snps,tx-queues-to-use = <4>; > + snps,tx-sched-sp; > + > + queue0 { > + snps,dcb-algorithm; > + }; > + > + queue1 { > + snps,dcb-algorithm; > + }; > + > + queue2 { > + snps,avb-algorithm; > + snps,send_slope = <0x1000>; > + snps,idle_slope = <0x1000>; > + snps,high_credit = <0x3e800>; > + snps,low_credit = <0xffc18000>; > + }; > + > + queue3 { > + snps,avb-algorithm; > + snps,send_slope = <0x1000>; > + snps,idle_slope = <0x1000>; > + snps,high_credit = <0x3e800>; > + snps,low_credit = <0xffc18000>; > + }; > + }; > +}; > + > &i2c11 { > clock-frequency = <400000>; > pinctrl-0 = <&qup_i2c11_default>;
diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts index dbd9553aa5c7..13508271bca8 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts +++ b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts @@ -261,6 +261,95 @@ vreg_l8e: ldo8 { }; }; +ðernet0 { + phy-mode = "sgmii"; + phy-handle = <&sgmii_phy>; + phy-supply = <&vreg_l5a>; + + pinctrl-0 = <ðernet0_default>; + pinctrl-names = "default"; + + snps,mtl-rx-config = <&mtl_rx_setup>; + snps,mtl-tx-config = <&mtl_tx_setup>; + snps,ps-speed = <1000>; + + status = "okay"; + + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>; + reset-delay-us = <11000>; + reset-post-delay-us = <70000>; + + sgmii_phy: phy@8 { + reg = <0x8>; + device_type = "ethernet-phy"; + }; + }; + + mtl_rx_setup: rx-queues-config { + snps,rx-queues-to-use = <4>; + snps,rx-sched-sp; + + queue0 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x0>; + snps,route-up; + snps,priority = <0x1>; + }; + + queue1 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x1>; + snps,route-ptp; + }; + + queue2 { + snps,avb-algorithm; + snps,map-to-dma-channel = <0x2>; + snps,route-avcp; + }; + + queue3 { + snps,avb-algorithm; + snps,map-to-dma-channel = <0x3>; + snps,priority = <0xc>; + }; + }; + + mtl_tx_setup: tx-queues-config { + snps,tx-queues-to-use = <4>; + snps,tx-sched-sp; + + queue0 { + snps,dcb-algorithm; + }; + + queue1 { + snps,dcb-algorithm; + }; + + queue2 { + snps,avb-algorithm; + snps,send_slope = <0x1000>; + snps,idle_slope = <0x1000>; + snps,high_credit = <0x3e800>; + snps,low_credit = <0xffc18000>; + }; + + queue3 { + snps,avb-algorithm; + snps,send_slope = <0x1000>; + snps,idle_slope = <0x1000>; + snps,high_credit = <0x3e800>; + snps,low_credit = <0xffc18000>; + }; + }; +}; + &i2c11 { clock-frequency = <400000>; pinctrl-0 = <&qup_i2c11_default>;