| Message ID | 20231213162856.188566-3-krzysztof.kozlowski@linaro.org (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 39859a1206e9ec47a00e7e712c5aecb4d352e001 |
| Headers | show |
| Series | arm64: dts: qcom: few improvements | expand |
Le 13/12/2023 à 17:28, Krzysztof Kozlowski a écrit : > The MCLK clocks of codec macros have fixed 19.2 MHz frequency and > assigning clock rates is redundant. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > > --- > > Not tested on HW. > --- > arch/arm64/boot/dts/qcom/sm8450.dtsi | 16 ---------------- > 1 file changed, 16 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi > index 3b6ea9653d2a..52390220d909 100644 > --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi > @@ -2154,9 +2154,6 @@ wsa2macro: codec@31e0000 { > <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, > <&vamacro>; > clock-names = "mclk", "npl", "macro", "dcodec", "fsgen"; > - assigned-clocks = <&q6prmcc LPASS_CLK_ID_WSA2_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, > - <&q6prmcc LPASS_CLK_ID_WSA2_CORE_TX_2X_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; > - assigned-clock-rates = <19200000>, <19200000>; > > #clock-cells = <0>; > clock-output-names = "wsa2-mclk"; > @@ -2203,10 +2200,6 @@ rxmacro: codec@3200000 { > <&vamacro>; > clock-names = "mclk", "npl", "macro", "dcodec", "fsgen"; > > - assigned-clocks = <&q6prmcc LPASS_CLK_ID_RX_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, > - <&q6prmcc LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; > - assigned-clock-rates = <19200000>, <19200000>; > - > #clock-cells = <0>; > clock-output-names = "mclk"; > #sound-dai-cells = <1>; > @@ -2250,9 +2243,6 @@ txmacro: codec@3220000 { > <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, > <&vamacro>; > clock-names = "mclk", "npl", "macro", "dcodec", "fsgen"; > - assigned-clocks = <&q6prmcc LPASS_CLK_ID_RX_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, > - <&q6prmcc LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; > - assigned-clock-rates = <19200000>, <19200000>; > > #clock-cells = <0>; > clock-output-names = "mclk"; > @@ -2269,10 +2259,6 @@ wsamacro: codec@3240000 { > <&vamacro>; > clock-names = "mclk", "npl", "macro", "dcodec", "fsgen"; > > - assigned-clocks = <&q6prmcc LPASS_CLK_ID_WSA_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, > - <&q6prmcc LPASS_CLK_ID_WSA_CORE_TX_2X_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; > - assigned-clock-rates = <19200000>, <19200000>; > - > #clock-cells = <0>; > clock-output-names = "mclk"; > #sound-dai-cells = <1>; > @@ -2348,8 +2334,6 @@ vamacro: codec@33f0000 { > <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, > <&q6prmcc LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; > clock-names = "mclk", "macro", "dcodec", "npl"; > - assigned-clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; > - assigned-clock-rates = <19200000>; > > #clock-cells = <0>; > clock-output-names = "fsgen"; Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 3b6ea9653d2a..52390220d909 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -2154,9 +2154,6 @@ wsa2macro: codec@31e0000 { <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, <&vamacro>; clock-names = "mclk", "npl", "macro", "dcodec", "fsgen"; - assigned-clocks = <&q6prmcc LPASS_CLK_ID_WSA2_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, - <&q6prmcc LPASS_CLK_ID_WSA2_CORE_TX_2X_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; - assigned-clock-rates = <19200000>, <19200000>; #clock-cells = <0>; clock-output-names = "wsa2-mclk"; @@ -2203,10 +2200,6 @@ rxmacro: codec@3200000 { <&vamacro>; clock-names = "mclk", "npl", "macro", "dcodec", "fsgen"; - assigned-clocks = <&q6prmcc LPASS_CLK_ID_RX_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, - <&q6prmcc LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; - assigned-clock-rates = <19200000>, <19200000>; - #clock-cells = <0>; clock-output-names = "mclk"; #sound-dai-cells = <1>; @@ -2250,9 +2243,6 @@ txmacro: codec@3220000 { <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, <&vamacro>; clock-names = "mclk", "npl", "macro", "dcodec", "fsgen"; - assigned-clocks = <&q6prmcc LPASS_CLK_ID_RX_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, - <&q6prmcc LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; - assigned-clock-rates = <19200000>, <19200000>; #clock-cells = <0>; clock-output-names = "mclk"; @@ -2269,10 +2259,6 @@ wsamacro: codec@3240000 { <&vamacro>; clock-names = "mclk", "npl", "macro", "dcodec", "fsgen"; - assigned-clocks = <&q6prmcc LPASS_CLK_ID_WSA_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, - <&q6prmcc LPASS_CLK_ID_WSA_CORE_TX_2X_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; - assigned-clock-rates = <19200000>, <19200000>; - #clock-cells = <0>; clock-output-names = "mclk"; #sound-dai-cells = <1>; @@ -2348,8 +2334,6 @@ vamacro: codec@33f0000 { <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, <&q6prmcc LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; clock-names = "mclk", "macro", "dcodec", "npl"; - assigned-clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; - assigned-clock-rates = <19200000>; #clock-cells = <0>; clock-output-names = "fsgen";
The MCLK clocks of codec macros have fixed 19.2 MHz frequency and assigning clock rates is redundant. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- Not tested on HW. --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 16 ---------------- 1 file changed, 16 deletions(-)