Show patches with: Submitter = Xingyu Wu       |   144 patches
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Patch Series A/R/T S/W/F Date Submitter Delegate State
[v7,2/2] riscv: dts: starfive: jh7110-common: Fix lower rate of CPUfreq by setting PLL0 rate to 1.5… Add notifier for PLL0 clock and set it 1.5GHz on the JH7110 SoC - 1 - --- 2024-08-26 Xingyu Wu Not Applicable
[v7,1/2] clk: starfive: jh7110-sys: Add notifier for PLL0 clock Add notifier for PLL0 clock and set it 1.5GHz on the JH7110 SoC - 2 1 --- 2024-08-26 Xingyu Wu Accepted
[v6] clk: starfive: jh7110-sys: Fix lower rate of CPUfreq by setting PLL0 rate to 1.5GHz [v6] clk: starfive: jh7110-sys: Fix lower rate of CPUfreq by setting PLL0 rate to 1.5GHz - - - --- 2024-06-03 Xingyu Wu Changes Requested
[v5,2/2] riscv: dts: starfive: visionfive-2: Fix lower rate of CPUfreq by setting PLL0 rate to 1.5G… Add notifier for PLL0 clock and set it 1.5GHz on - 1 - --- 2024-05-07 Xingyu Wu Not Applicable
[v5,1/2] clk: starfive: jh7110-sys: Add notifier for PLL0 clock Add notifier for PLL0 clock and set it 1.5GHz on - 1 - --- 2024-05-07 Xingyu Wu Superseded
[v4,2/2] riscv: dts: starfive: visionfive-2: Fix lower rate of CPUfreq by setting PLL0 rate to 1.5G… Add notifier for PLL0 clock and set it 1.5GHz on - - - --- 2024-04-10 Xingyu Wu Not Applicable
[v4,1/2] clk: starfive: jh7110-sys: Add notifier for PLL clock Add notifier for PLL0 clock and set it 1.5GHz on - - - --- 2024-04-10 Xingyu Wu New
[v3] clk: starfive: pll: Fix lower rate of CPUfreq by setting PLL0 rate to 1.5GHz [v3] clk: starfive: pll: Fix lower rate of CPUfreq by setting PLL0 rate to 1.5GHz - 1 - --- 2024-04-02 Xingyu Wu Changes Requested
[v2] clk: starfive: jh7110-sys: Fix lower rate of CPUfreq by setting PLL0 rate to 1.5GHz [v2] clk: starfive: jh7110-sys: Fix lower rate of CPUfreq by setting PLL0 rate to 1.5GHz - 1 - --- 2023-08-21 Xingyu Wu Changes Requested
[v1] clk: starfive: jh7110-sys: Set PLL0 rate to 1.5GHz [v1] clk: starfive: jh7110-sys: Set PLL0 rate to 1.5GHz - 1 - --- 2023-08-11 Xingyu Wu Changes Requested
[v1] reset: starfive: jh7110: Add StarFive STG/ISP/VOUT resets support [v1] reset: starfive: jh7110: Add StarFive STG/ISP/VOUT resets support 1 2 - --- 2023-07-24 Xingyu Wu Accepted
[v7,7/7] riscv: dts: starfive: jh7110: Add PLL clocks source in SYSCRG node Add PLL clocks driver and syscon for StarFive JH7110 SoC - 2 - --- 2023-07-17 Xingyu Wu Not Applicable
[v7,6/7] riscv: dts: starfive: jh7110: Add syscon nodes Add PLL clocks driver and syscon for StarFive JH7110 SoC - 2 - --- 2023-07-17 Xingyu Wu Not Applicable
[v7,5/7] clk: starfive: jh7110-sys: Add PLL clocks source from DTS Add PLL clocks driver and syscon for StarFive JH7110 SoC - 1 - --- 2023-07-17 Xingyu Wu Awaiting Upstream
[v7,4/7] clk: starfive: Add StarFive JH7110 PLL clock driver Add PLL clocks driver and syscon for StarFive JH7110 SoC - - - --- 2023-07-17 Xingyu Wu Awaiting Upstream
[v7,3/7] dt-bindings: clock: jh7110-syscrg: Add PLL clock inputs Add PLL clocks driver and syscon for StarFive JH7110 SoC - 2 - --- 2023-07-17 Xingyu Wu Awaiting Upstream
[v7,2/7] dt-bindings: soc: starfive: Add StarFive syscon module Add PLL clocks driver and syscon for StarFive JH7110 SoC - 2 - --- 2023-07-17 Xingyu Wu Not Applicable
[v7,1/7] dt-bindings: clock: Add StarFive JH7110 PLL clock generator Add PLL clocks driver and syscon for StarFive JH7110 SoC - 3 - --- 2023-07-17 Xingyu Wu Awaiting Upstream
[v8,9/9] riscv: dts: starfive: jh7110: Add STGCRG/ISPCRG/VOUTCRG nodes Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 1 2 - --- 2023-07-13 Xingyu Wu Not Applicable
[v8,8/9] riscv: dts: starfive: jh7110: Add DVP and HDMI TX pixel external clocks Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 1 2 - --- 2023-07-13 Xingyu Wu Not Applicable
[v8,7/9] reset: starfive: jh7110: Add StarFive STG/ISP/VOUT resets support Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 1 2 - --- 2023-07-13 Xingyu Wu Awaiting Upstream
[v8,6/9] clk: starfive: Add StarFive JH7110 Video-Output clock driver Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 1 2 - --- 2023-07-13 Xingyu Wu Awaiting Upstream
[v8,5/9] dt-bindings: clock: Add StarFive JH7110 Video-Output clock and reset generator Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 1 2 - --- 2023-07-13 Xingyu Wu Awaiting Upstream
[v8,4/9] clk: starfive: Add StarFive JH7110 Image-Signal-Process clock driver Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 1 2 - --- 2023-07-13 Xingyu Wu Awaiting Upstream
[v8,3/9] dt-bindings: clock: Add StarFive JH7110 Image-Signal-Process clock and reset generator Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 1 2 - --- 2023-07-13 Xingyu Wu Awaiting Upstream
[v8,2/9] clk: starfive: Add StarFive JH7110 System-Top-Group clock driver Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 1 1 - --- 2023-07-13 Xingyu Wu Awaiting Upstream
[v8,1/9] dt-bindings: clock: Add StarFive JH7110 System-Top-Group clock and reset generator Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 1 2 - --- 2023-07-13 Xingyu Wu Awaiting Upstream
[v7,9/9] riscv: dts: starfive: jh7110: Add STGCRG/ISPCRG/VOUTCRG nodes Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - 2 - --- 2023-07-12 Xingyu Wu Superseded
[v7,8/9] riscv: dts: starfive: jh7110: Add DVP and HDMI TX pixel external clocks Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - 2 - --- 2023-07-12 Xingyu Wu Superseded
[v7,7/9] reset: starfive: jh7110: Add StarFive STG/ISP/VOUT resets support Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - 2 - --- 2023-07-12 Xingyu Wu Superseded
[v7,6/9] clk: starfive: Add StarFive JH7110 Video-Output clock driver Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - 2 - --- 2023-07-12 Xingyu Wu Superseded
[v7,5/9] dt-bindings: clock: Add StarFive JH7110 Video-Output clock and reset generator Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - 2 - --- 2023-07-12 Xingyu Wu Superseded
[v7,4/9] clk: starfive: Add StarFive JH7110 Image-Signal-Process clock driver Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - 2 - --- 2023-07-12 Xingyu Wu Superseded
[v7,3/9] dt-bindings: clock: Add StarFive JH7110 Image-Signal-Process clock and reset generator Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - 2 - --- 2023-07-12 Xingyu Wu Superseded
[v7,2/9] clk: starfive: Add StarFive JH7110 System-Top-Group clock driver Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - 2 - --- 2023-07-12 Xingyu Wu Superseded
[v7,1/9] dt-bindings: clock: Add StarFive JH7110 System-Top-Group clock and reset generator Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - 2 - --- 2023-07-12 Xingyu Wu Superseded
[RESEND,v6,7/7] riscv: dts: starfive: jh7110: Add PLL clocks source in SYSCRG node Add PLL clocks driver and syscon for StarFive JH7110 SoC - 2 - --- 2023-07-04 Xingyu Wu Superseded
[RESEND,v6,6/7] riscv: dts: starfive: jh7110: Add syscon nodes Add PLL clocks driver and syscon for StarFive JH7110 SoC - 2 - --- 2023-07-04 Xingyu Wu Superseded
[RESEND,v6,5/7] clk: starfive: jh7110-sys: Add PLL clocks source from DTS Add PLL clocks driver and syscon for StarFive JH7110 SoC - 1 - --- 2023-07-04 Xingyu Wu Superseded
[RESEND,v6,4/7] clk: starfive: Add StarFive JH7110 PLL clock driver Add PLL clocks driver and syscon for StarFive JH7110 SoC - 1 - --- 2023-07-04 Xingyu Wu Superseded
[RESEND,v6,3/7] dt-bindings: clock: jh7110-syscrg: Add PLL clock inputs Add PLL clocks driver and syscon for StarFive JH7110 SoC - 2 - --- 2023-07-04 Xingyu Wu Superseded
[RESEND,v6,2/7] dt-bindings: soc: starfive: Add StarFive syscon module Add PLL clocks driver and syscon for StarFive JH7110 SoC - 2 - --- 2023-07-04 Xingyu Wu Superseded
[RESEND,v6,1/7] dt-bindings: clock: Add StarFive JH7110 PLL clock generator Add PLL clocks driver and syscon for StarFive JH7110 SoC - 2 - --- 2023-07-04 Xingyu Wu Superseded
[v6,7/7] riscv: dts: starfive: jh7110: Add PLL clocks source in SYSCRG node Add PLL clocks driver and syscon for StarFive JH7110 SoC - 1 - --- 2023-07-04 Xingyu Wu Not Applicable
[v6,6/7] riscv: dts: starfive: jh7110: Add syscon nodes Add PLL clocks driver and syscon for StarFive JH7110 SoC - 1 - --- 2023-07-04 Xingyu Wu Not Applicable
[v6,5/7] clk: starfive: jh7110-sys: Add PLL clocks source from DTS Add PLL clocks driver and syscon for StarFive JH7110 SoC - - - --- 2023-07-04 Xingyu Wu Superseded
[v6,4/7] clk: starfive: Add StarFive JH7110 PLL clock driver Add PLL clocks driver and syscon for StarFive JH7110 SoC - - - --- 2023-07-04 Xingyu Wu Superseded
[v6,3/7] dt-bindings: clock: jh7110-syscrg: Add PLL clock inputs Add PLL clocks driver and syscon for StarFive JH7110 SoC - - - --- 2023-07-04 Xingyu Wu Superseded
[v6,2/7] dt-bindings: soc: starfive: Add StarFive syscon module Add PLL clocks driver and syscon for StarFive JH7110 SoC - - - --- 2023-07-04 Xingyu Wu Not Applicable
[v6,1/7] dt-bindings: clock: Add StarFive JH7110 PLL clock generator Add PLL clocks driver and syscon for StarFive JH7110 SoC - 2 - --- 2023-07-04 Xingyu Wu Superseded
[v5,7/7] riscv: dts: starfive: jh7110: Add PLL clock source in SYSCRG node Add PLL clocks driver and syscon for StarFive JH7110 SoC - 1 - --- 2023-06-13 Xingyu Wu Changes Requested
[v5,6/7] riscv: dts: starfive: jh7110: Add syscon nodes Add PLL clocks driver and syscon for StarFive JH7110 SoC - 1 - --- 2023-06-13 Xingyu Wu Changes Requested
[v5,5/7] clk: starfive: jh7110-sys: Add PLL clocks source from DTS Add PLL clocks driver and syscon for StarFive JH7110 SoC - - - --- 2023-06-13 Xingyu Wu Changes Requested
[v5,4/7] clk: starfive: Add StarFive JH7110 PLL clock driver Add PLL clocks driver and syscon for StarFive JH7110 SoC - - - --- 2023-06-13 Xingyu Wu Changes Requested
[v5,3/7] dt-bindings: clock: jh7110-syscrg: Add PLL clock inputs Add PLL clocks driver and syscon for StarFive JH7110 SoC - - - --- 2023-06-13 Xingyu Wu Changes Requested
[v5,2/7] dt-bindings: soc: starfive: Add StarFive syscon module Add PLL clocks driver and syscon for StarFive JH7110 SoC - - - --- 2023-06-13 Xingyu Wu Changes Requested
[v5,1/7] dt-bindings: clock: Add StarFive JH7110 PLL clock generator Add PLL clocks driver and syscon for StarFive JH7110 SoC - 2 - --- 2023-06-13 Xingyu Wu Changes Requested
[v6,11/11] riscv: dts: starfive: jh7110: Add STGCRG/ISPCRG/VOUTCRG nodes Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - 1 - --- 2023-05-18 Xingyu Wu Not Applicable
[v6,10/11] riscv: dts: starfive: jh7110: Add DVP and HDMI TX pixel external clocks Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - 1 - --- 2023-05-18 Xingyu Wu Not Applicable
[v6,09/11] riscv: dts: starfive: jh7110: add pmu controller node Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - - - --- 2023-05-18 Xingyu Wu Not Applicable
[v6,08/11] reset: starfive: jh7110: Add StarFive STG/ISP/VOUT resets support Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - 1 - --- 2023-05-18 Xingyu Wu Not Applicable
[v6,07/11] MAINTAINERS: Update maintainer of JH71x0 clock drivers Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - - - --- 2023-05-18 Xingyu Wu Not Applicable
[v6,06/11] clk: starfive: Add StarFive JH7110 Video-Output clock driver Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - - - --- 2023-05-18 Xingyu Wu Not Applicable
[v6,05/11] dt-bindings: clock: Add StarFive JH7110 Video-Output clock and reset generator Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - 1 - --- 2023-05-18 Xingyu Wu Not Applicable
[v6,04/11] clk: starfive: Add StarFive JH7110 Image-Signal-Process clock driver Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - - - --- 2023-05-18 Xingyu Wu Not Applicable
[v6,03/11] dt-bindings: clock: Add StarFive JH7110 Image-Signal-Process clock and reset generator Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - 1 - --- 2023-05-18 Xingyu Wu Not Applicable
[v6,02/11] clk: starfive: Add StarFive JH7110 System-Top-Group clock driver Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - 1 - --- 2023-05-18 Xingyu Wu Changes Requested
[v6,01/11] dt-bindings: clock: Add StarFive JH7110 System-Top-Group clock and reset generator Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - 1 - --- 2023-05-18 Xingyu Wu Not Applicable
[v4,7/7] riscv: dts: starfive: jh7110: Add PLL clock node and modify syscrg node Add PLL clocks driver and syscon for StarFive JH7110 SoC - - - --- 2023-05-12 Xingyu Wu Not Applicable
[v4,6/7] riscv: dts: starfive: jh7110: Add syscon nodes Add PLL clocks driver and syscon for StarFive JH7110 SoC - 2 - --- 2023-05-12 Xingyu Wu Not Applicable
[v4,5/7] dt-bindings: soc: starfive: Add StarFive syscon module Add PLL clocks driver and syscon for StarFive JH7110 SoC - 1 - --- 2023-05-12 Xingyu Wu Not Applicable
[v4,4/7] clk: starfive: jh7110-sys: Modify PLL clocks source Add PLL clocks driver and syscon for StarFive JH7110 SoC - - - --- 2023-05-12 Xingyu Wu Not Applicable
[v4,3/7] dt-bindings: clock: jh7110-syscrg: Add PLL clock inputs Add PLL clocks driver and syscon for StarFive JH7110 SoC 1 - - --- 2023-05-12 Xingyu Wu Changes Requested
[v4,2/7] clk: starfive: Add StarFive JH7110 PLL clock driver Add PLL clocks driver and syscon for StarFive JH7110 SoC - - - --- 2023-05-12 Xingyu Wu Not Applicable
[v4,1/7] dt-bindings: clock: Add StarFive JH7110 PLL clock generator Add PLL clocks driver and syscon for StarFive JH7110 SoC - 1 - --- 2023-05-12 Xingyu Wu Not Applicable
[v5,10/10] riscv: dts: starfive: jh7110: Add STGCRG/ISPCRG/VOUTCRG nodes Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - 1 - --- 2023-04-24 Xingyu Wu Superseded
[v5,09/10] riscv: dts: starfive: jh7110: Add DVP and HDMI TX pixel external clocks Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - - - --- 2023-04-24 Xingyu Wu Superseded
[v5,08/10] reset: starfive: jh7110: Add StarFive STG/ISP/VOUT resets support Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - - - --- 2023-04-24 Xingyu Wu Superseded
[v5,07/10] MAINTAINERS: Update maintainer of JH71x0 clock drivers Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - - - --- 2023-04-24 Xingyu Wu Superseded
[v5,06/10] clk: starfive: Add StarFive JH7110 Video-Output clock driver Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - - - --- 2023-04-24 Xingyu Wu Superseded
[v5,05/10] dt-bindings: clock: Add StarFive JH7110 Video-Output clock and reset generator Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - 1 - --- 2023-04-24 Xingyu Wu Superseded
[v5,04/10] clk: starfive: Add StarFive JH7110 Image-Signal-Process clock driver Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - - - --- 2023-04-24 Xingyu Wu Superseded
[v5,03/10] dt-bindings: clock: Add StarFive JH7110 Image-Signal-Process clock and reset generator Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - 1 - --- 2023-04-24 Xingyu Wu Superseded
[v5,02/10] clk: starfive: Add StarFive JH7110 System-Top-Group clock driver Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - - - --- 2023-04-24 Xingyu Wu Superseded
[v5,01/10] dt-bindings: clock: Add StarFive JH7110 System-Top-Group clock and reset generator Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - 1 - --- 2023-04-24 Xingyu Wu Superseded
[v3,7/7] riscv: dts: starfive: jh7110: Add PLL clock node and modify syscrg node Add PLL clocks driver for StarFive JH7110 SoC - - - --- 2023-04-14 Xingyu Wu Not Applicable
[v3,6/7] riscv: dts: starfive: jh7110: Add syscon nodes Add PLL clocks driver for StarFive JH7110 SoC - 2 - --- 2023-04-14 Xingyu Wu Not Applicable
[v3,5/7] dt-bindings: soc: starfive: Add StarFive syscon module Add PLL clocks driver for StarFive JH7110 SoC - 1 - --- 2023-04-14 Xingyu Wu Superseded
[v3,4/7] clk: starfive: jh7110-sys: Modify PLL clocks source Add PLL clocks driver for StarFive JH7110 SoC - - - --- 2023-04-14 Xingyu Wu Superseded
[v3,3/7] dt-bindings: clock: jh7110-syscrg: Add PLL clock inputs Add PLL clocks driver for StarFive JH7110 SoC 1 - - --- 2023-04-14 Xingyu Wu Superseded
[v3,2/7] clk: starfive: Add StarFive JH7110 PLL clock driver Add PLL clocks driver for StarFive JH7110 SoC - - - --- 2023-04-14 Xingyu Wu Superseded
[v3,1/7] dt-bindings: clock: Add StarFive JH7110 PLL clock generator Add PLL clocks driver for StarFive JH7110 SoC - 1 - --- 2023-04-14 Xingyu Wu Superseded
[v4,10/10] riscv: dts: starfive: jh7110: Add STGCRG/ISPCRG/VOUTCRG nodes Add new partial clock and reset drivers for StarFive JH7110 - 1 - --- 2023-04-11 Xingyu Wu Not Applicable
[v4,09/10] riscv: dts: starfive: jh7110: Add DVP and HDMI TX pixel external clocks Add new partial clock and reset drivers for StarFive JH7110 - - - --- 2023-04-11 Xingyu Wu Not Applicable
[v4,08/10] MAINTAINERS: Update maintainer of JH71x0 clock drivers Add new partial clock and reset drivers for StarFive JH7110 - - - --- 2023-04-11 Xingyu Wu Superseded
[v4,07/10] clk: starfive: Add StarFive JH7110 Video-Output clock driver Add new partial clock and reset drivers for StarFive JH7110 - - - --- 2023-04-11 Xingyu Wu Changes Requested
[v4,06/10] dt-bindings: clock: Add StarFive JH7110 Video-Output clock and reset generator Add new partial clock and reset drivers for StarFive JH7110 - 1 - --- 2023-04-11 Xingyu Wu Superseded
[v4,05/10] clk: starfive: Add StarFive JH7110 Image-Signal-Process clock driver Add new partial clock and reset drivers for StarFive JH7110 - - - --- 2023-04-11 Xingyu Wu Changes Requested
[v4,04/10] dt-bindings: clock: Add StarFive JH7110 Image-Signal-Process clock and reset generator Add new partial clock and reset drivers for StarFive JH7110 - 1 - --- 2023-04-11 Xingyu Wu Superseded
[v4,03/10] clk: starfive: Add StarFive JH7110 System-Top-Group clock driver Add new partial clock and reset drivers for StarFive JH7110 - - - --- 2023-04-11 Xingyu Wu Changes Requested
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