Show patches with: Submitter = Joel Stanley       |   48 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
clk: ast2600: BCLK comes from EPLL clk: ast2600: BCLK comes from EPLL - - - --- 2022-04-21 Joel Stanley Accepted
clk/ast2600: Fix soc revision for AHB clk/ast2600: Fix soc revision for AHB - 1 - --- 2021-09-22 Joel Stanley Accepted
clk: ast2600: Fix enabling of clocks clk: ast2600: Fix enabling of clocks - 1 - --- 2019-10-16 Joel Stanley Accepted
[v2,2/2] clk: Add support for AST2600 SoC clk: Add driver for ast2600 - - - --- 2019-08-25 Joel Stanley Accepted
[v2,1/2] clk: aspeed: Move structures to header clk: Add driver for ast2600 - - - --- 2019-08-25 Joel Stanley Accepted
[2/2] clk: Add support for AST2600 SoC clk: Add driver for ast2600 - - - --- 2019-08-16 Joel Stanley Changes Requested
[1/2] clk: aspeed: Move structures to header clk: Add driver for ast2600 - - - --- 2019-08-16 Joel Stanley Changes Requested
clk: aspeed: Support HPLL strapping on ast2400 - 1 - --- 2018-06-28 Joel Stanley Accepted
clk: aspeed: Mark bclk (PCIe) and dclk (VGA) as critical 1 - 1 --- 2018-06-07 Joel Stanley Accepted
[v2] clk: aspeed: Support second reset register - 1 - --- 2018-04-27 Joel Stanley Accepted
clk: aspeed: Support second reset register - 1 - --- 2018-04-19 Joel Stanley Superseded
[v7,5/5] clk: aspeed: Add reset controller - 2 - --- 2017-12-22 Joel Stanley Accepted
[v7,4/5] clk: aspeed: Register gated clocks - 2 - --- 2017-12-22 Joel Stanley Accepted
[v7,3/5] clk: aspeed: Add platform driver and register PLLs - 2 - --- 2017-12-22 Joel Stanley Accepted
[v7,2/5] clk: aspeed: Register core clocks - 2 - --- 2017-12-22 Joel Stanley Accepted
[v7,1/5] clk: Add clock driver for ASPEED BMC SoCs - 2 - --- 2017-12-22 Joel Stanley Accepted
[v6,5/5] clk: aspeed: Add reset controller - 1 - --- 2017-11-28 Joel Stanley Changes Requested
[v6,4/5] clk: aspeed: Register gated clocks - 1 - --- 2017-11-28 Joel Stanley Changes Requested
[v6,3/5] clk: aspeed: Add platform driver and register PLLs - 1 - --- 2017-11-28 Joel Stanley Changes Requested
[v6,2/5] clk: aspeed: Register core clocks - 1 - --- 2017-11-28 Joel Stanley Changes Requested
[v6,1/5] clk: Add clock driver for ASPEED BMC SoCs - 1 - --- 2017-11-28 Joel Stanley Changes Requested
[v5,5/5] clk: aspeed: Add reset controller - 1 - --- 2017-10-30 Joel Stanley Superseded
[v5,4/5] clk: aspeed: Register gated clocks - 1 - --- 2017-10-30 Joel Stanley Superseded
[v5,3/5] clk: aspeed: Add platform driver and register PLLs - 1 - --- 2017-10-30 Joel Stanley Superseded
[v5,2/5] clk: aspeed: Register core clocks - 1 - --- 2017-10-30 Joel Stanley Superseded
[v5,1/5] clk: Add clock driver for ASPEED BMC SoCs - 1 - --- 2017-10-30 Joel Stanley Superseded
[v4,5/5] clk: aspeed: Add reset controller - 1 - --- 2017-10-03 Joel Stanley Superseded
[v4,4/5] clk: aspeed: Register gated clocks 1 - - --- 2017-10-03 Joel Stanley Superseded
[v4,3/5] clk: aspeed: Add platform driver and register PLLs - - - --- 2017-10-03 Joel Stanley Superseded
[v4,2/5] clk: aspeed: Register core clocks - 1 - --- 2017-10-03 Joel Stanley Superseded
[v4,1/5] clk: Add clock driver for ASPEED BMC SoCs - 1 - --- 2017-10-03 Joel Stanley Superseded
[v3,5/5] clk: aspeed: Add reset controller - - - --- 2017-09-27 Joel Stanley Superseded
[v3,4/5] clk: aspeed: Register gated clocks - - - --- 2017-09-27 Joel Stanley Superseded
[v3,3/5] clk: aspeed: Add platform driver and register PLLs - - - --- 2017-09-27 Joel Stanley Superseded
[v3,2/5] clk: aspeed: Register core clocks - - - --- 2017-09-27 Joel Stanley Superseded
[v3,1/5] clk: Add clock driver for ASPEED BMC SoCs - - - --- 2017-09-27 Joel Stanley Superseded
[v2,5/5] clk: aspeed: Add reset controller - - - --- 2017-09-21 Joel Stanley Superseded
[v2,4/5] clk: aspeed: Register gated clocks - - - --- 2017-09-21 Joel Stanley Superseded
[v2,3/5] clk: aspeed: Add platform driver and register PLLs - - - --- 2017-09-21 Joel Stanley Superseded
[v2,2/5] clk: aspeed: Register core clocks - - - --- 2017-09-21 Joel Stanley Superseded
[v2,1/5] clk: Add clock driver for ASPEED BMC SoCs - - - --- 2017-09-21 Joel Stanley Superseded
[2/2] clk: Add Aspeed G5 clock driver - - - --- 2017-08-23 Joel Stanley Superseded
[1/2] dt-bindings: aspeed-scu: Add clock and reset properties 1 - - --- 2017-08-23 Joel Stanley Superseded
clk: gemini: Read status before using the value - 1 - --- 2017-06-29 Joel Stanley sboyd Accepted
[4/4] drivers/clk: Support Aspeed UART clock divisor - - - --- 2016-05-09 Joel Stanley sboyd Changes Requested
[3/4] drvers/clk: Support fifth generation Aspeed SoCs - - - --- 2016-05-09 Joel Stanley sboyd Changes Requested
[2/4] drvers/clk: Support fourth generation Aspeed SoCs - - - --- 2016-05-09 Joel Stanley sboyd Changes Requested
[1/4] doc/devicetree: Add Aspeed clock bindings - - - --- 2016-05-09 Joel Stanley sboyd Changes Requested