| Message ID | 20230615093227.576102-12-claudiu.beznea@microchip.com (mailing list archive) |
|---|---|
| State | Awaiting Upstream, archived |
| Headers | show |
| Series | clk: at91: add support for parent_data and parent_hw | expand |
On Thu, Jun 15, 2023 at 12:32:27PM +0300, Claudiu Beznea wrote: > s/ep_chg_chg_id/ep_chg_id in documentation of master clock structure. > > Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Maxime Ripard <mripard@kernel.org> Maxime
diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c index 7e06ea22c8af..91b5c6f14819 100644 --- a/drivers/clk/at91/sama7g5.c +++ b/drivers/clk/at91/sama7g5.c @@ -354,10 +354,10 @@ static struct sama7g5_pll { /* * Master clock (MCK[1..4]) description * @n: clock name - * @ep_chg_chg_id: index in parents array that specifies the changeable * @ep: extra parents names array (entry formed by PLL components * identifiers (see enum pll_component_id)) * @hw: pointer to clk_hw + * @ep_chg_id: index in parents array that specifies the changeable * parent * @ep_count: extra parents count * @ep_mux_table: mux table for extra parents
s/ep_chg_chg_id/ep_chg_id in documentation of master clock structure. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> --- drivers/clk/at91/sama7g5.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)