@@ -1054,6 +1054,8 @@ struct addr_ctx {
u64 ret_addr;
u32 tmp;
u32 reg_dram_offset;
+ u32 reg_base_addr;
+ u32 reg_limit_addr;
u16 nid;
u8 inst_id;
u8 map_num;
@@ -1103,6 +1105,27 @@ static int remove_dram_offset(struct addr_ctx *ctx)
return 0;
}
+static int get_dram_addr_map(struct addr_ctx *ctx)
+{
+ /* Read D18F0x110 (DramBaseAddress). */
+ if (df_indirect_read_instance(ctx->nid, 0, 0x110 + (8 * ctx->map_num),
+ ctx->inst_id, &ctx->reg_base_addr))
+ return -EINVAL;
+
+ /* Check if address range is valid. */
+ if (!(ctx->reg_base_addr & BIT(0))) {
+ pr_debug("Invalid DramBaseAddress range: 0x%x.\n", ctx->reg_base_addr);
+ return -EINVAL;
+ }
+
+ /* Read D18F0x114 (DramLimitAddress). */
+ if (df_indirect_read_instance(ctx->nid, 0, 0x114 + (8 * ctx->map_num),
+ ctx->inst_id, &ctx->reg_limit_addr))
+ return -EINVAL;
+
+ return 0;
+}
+
static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr)
{
u64 dram_base_addr, dram_limit_addr, dram_hole_base;
@@ -1131,21 +1154,13 @@ static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr
if (remove_dram_offset(&ctx))
goto out_err;
- /* Read D18F0x110 (DramBaseAddress). */
- if (df_indirect_read_instance(nid, 0, 0x110 + (8 * ctx.map_num), umc, &ctx.tmp))
+ if (get_dram_addr_map(&ctx))
goto out_err;
- /* Check if address range is valid. */
- if (!(ctx.tmp & BIT(0))) {
- pr_err("%s: Invalid DramBaseAddress range: 0x%x.\n",
- __func__, ctx.tmp);
- goto out_err;
- }
-
- lgcy_mmio_hole_en = ctx.tmp & BIT(1);
- intlv_num_chan = (ctx.tmp >> 4) & 0xF;
- intlv_addr_sel = (ctx.tmp >> 8) & 0x7;
- dram_base_addr = (ctx.tmp & GENMASK_ULL(31, 12)) << 16;
+ lgcy_mmio_hole_en = ctx.reg_base_addr & BIT(1);
+ intlv_num_chan = (ctx.reg_base_addr >> 4) & 0xF;
+ intlv_addr_sel = (ctx.reg_base_addr >> 8) & 0x7;
+ dram_base_addr = (ctx.reg_base_addr & GENMASK_ULL(31, 12)) << 16;
/* {0, 1, 2, 3} map to address bits {8, 9, 10, 11} respectively */
if (intlv_addr_sel > 3) {
@@ -1154,13 +1169,9 @@ static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr
goto out_err;
}
- /* Read D18F0x114 (DramLimitAddress). */
- if (df_indirect_read_instance(nid, 0, 0x114 + (8 * ctx.map_num), umc, &ctx.tmp))
- goto out_err;
-
- intlv_num_sockets = (ctx.tmp >> 8) & 0x1;
- intlv_num_dies = (ctx.tmp >> 10) & 0x3;
- dram_limit_addr = ((ctx.tmp & GENMASK_ULL(31, 12)) << 16) | GENMASK_ULL(27, 0);
+ intlv_num_sockets = (ctx.reg_limit_addr >> 8) & 0x1;
+ intlv_num_dies = (ctx.reg_limit_addr >> 10) & 0x3;
+ dram_limit_addr = ((ctx.reg_limit_addr & GENMASK_ULL(31, 12)) << 16) | GENMASK_ULL(27, 0);
intlv_addr_bit = intlv_addr_sel + 8;
Move the reading of the base and limit registers into a helper function. Save the raw values in the context struct as they will be parsed later. Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> --- Link: https://lkml.kernel.org/r/20210623192002.3671647-9-yazen.ghannam@amd.com v2->v3: * Was patch 8 in v2. * Dropped "df_regs" use. v1->v2: * Moved from arch/x86 to EDAC. drivers/edac/amd64_edac.c | 51 ++++++++++++++++++++++++--------------- 1 file changed, 31 insertions(+), 20 deletions(-)