| Message ID | 20231017194657.3199749-2-Frank.Li@nxp.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [v2,1/2] i3c: master: svc: fix compatibility string mismatch with binding doc | expand |
On Tue, Oct 17, 2023 at 03:46:57PM -0400, Frank Li wrote: > Add I3C1 and I3C2. > > Signed-off-by: Frank Li <Frank.Li@nxp.com> > --- @Guo Shawn: Driver part already merged. Please pick up dts part Frank > > Notes: > Change from v1 to v2 > - using compatible string silvaco,i3c-master-v1 > > arch/arm64/boot/dts/freescale/imx93.dtsi | 26 ++++++++++++++++++++++++ > 1 file changed, 26 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi > index 6f85a05ee7e1a..c6ad9ba9eb9af 100644 > --- a/arch/arm64/boot/dts/freescale/imx93.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi > @@ -242,6 +242,19 @@ tpm2: pwm@44320000 { > status = "disabled"; > }; > > + i3c1: i3c-master@44330000 { > + compatible = "silvaco,i3c-master-v1"; > + reg = <0x44330000 0x10000>; > + interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <3>; > + #size-cells = <0>; > + clocks = <&clk IMX93_CLK_BUS_AON>, > + <&clk IMX93_CLK_I3C1_GATE>, > + <&clk IMX93_CLK_I3C1_SLOW>; > + clock-names = "pclk", "fast_clk", "slow_clk"; > + status = "disabled"; > + }; > + > lpi2c1: i2c@44340000 { > compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c"; > reg = <0x44340000 0x10000>; > @@ -496,6 +509,19 @@ tpm6: pwm@42510000 { > status = "disabled"; > }; > > + i3c2: i3c-master@42520000 { > + compatible = "silvaco,i3c-master-v1"; > + reg = <0x42520000 0x10000>; > + interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <3>; > + #size-cells = <0>; > + clocks = <&clk IMX93_CLK_BUS_WAKEUP>, > + <&clk IMX93_CLK_I3C2_GATE>, > + <&clk IMX93_CLK_I3C2_SLOW>; > + clock-names = "pclk", "fast_clk", "slow_clk"; > + status = "disabled"; > + }; > + > lpi2c3: i2c@42530000 { > compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c"; > reg = <0x42530000 0x10000>; > -- > 2.34.1 >
On 09/11/2023 16:51, Frank Li wrote: > On Tue, Oct 17, 2023 at 03:46:57PM -0400, Frank Li wrote: >> Add I3C1 and I3C2. >> >> Signed-off-by: Frank Li <Frank.Li@nxp.com> >> --- > > @Guo Shawn: > > Driver part already merged. > > Please pick up dts part It's merge window. What do you expect exactly? Best regards, Krzysztof
On Thu, Nov 09, 2023 at 10:51:13AM -0500, Frank Li wrote: > On Tue, Oct 17, 2023 at 03:46:57PM -0400, Frank Li wrote: > > Add I3C1 and I3C2. > > > > Signed-off-by: Frank Li <Frank.Li@nxp.com> > > --- > > @Guo Shawn: > > Driver part already merged. > > Please pick up dts part Rob had a comment [1] about SoC specific compatible. That's not what we want? Shawn [1] https://lkml.iu.edu/hypermail/linux/kernel/2310.2/03035.html
On Mon, Nov 27, 2023 at 10:21:40AM +0800, Shawn Guo wrote: > On Thu, Nov 09, 2023 at 10:51:13AM -0500, Frank Li wrote: > > On Tue, Oct 17, 2023 at 03:46:57PM -0400, Frank Li wrote: > > > Add I3C1 and I3C2. > > > > > > Signed-off-by: Frank Li <Frank.Li@nxp.com> > > > --- > > > > @Guo Shawn: > > > > Driver part already merged. > > > > Please pick up dts part > > Rob had a comment [1] about SoC specific compatible. That's not what we > want? > > Shawn > > [1] https://lkml.iu.edu/hypermail/linux/kernel/2310.2/03035.html Yeah, Rob's request here looks valid to me. Should just be a bindings change Frank & fall back to the "silvaco,i3c-master-v1" compatible. Cheers, Conor.
On Mon, Nov 27, 2023 at 09:35:39AM +0000, Conor Dooley wrote: > On Mon, Nov 27, 2023 at 10:21:40AM +0800, Shawn Guo wrote: > > On Thu, Nov 09, 2023 at 10:51:13AM -0500, Frank Li wrote: > > > On Tue, Oct 17, 2023 at 03:46:57PM -0400, Frank Li wrote: > > > > Add I3C1 and I3C2. > > > > > > > > Signed-off-by: Frank Li <Frank.Li@nxp.com> > > > > --- > > > > > > @Guo Shawn: > > > > > > Driver part already merged. > > > > > > Please pick up dts part > > > > Rob had a comment [1] about SoC specific compatible. That's not what we > > want? > > > > Shawn > > > > [1] https://lkml.iu.edu/hypermail/linux/kernel/2310.2/03035.html > > Yeah, Rob's request here looks valid to me. Should just be a bindings > change Frank & fall back to the "silvaco,i3c-master-v1" compatible. > > Cheers, > Conor. @shawn: rob agree on "silvaco,i3c-master-v1" compatible. Frank
On Wed, Dec 06, 2023 at 12:46:15AM -0500, Frank Li wrote: > On Mon, Nov 27, 2023 at 09:35:39AM +0000, Conor Dooley wrote: > > On Mon, Nov 27, 2023 at 10:21:40AM +0800, Shawn Guo wrote: > > > On Thu, Nov 09, 2023 at 10:51:13AM -0500, Frank Li wrote: > > > > On Tue, Oct 17, 2023 at 03:46:57PM -0400, Frank Li wrote: > > > > > Add I3C1 and I3C2. > > > > > > > > > > Signed-off-by: Frank Li <Frank.Li@nxp.com> > > > > > --- > > > > > > > > @Guo Shawn: > > > > > > > > Driver part already merged. > > > > > > > > Please pick up dts part > > > > > > Rob had a comment [1] about SoC specific compatible. That's not what we > > > want? > > > > > > Shawn > > > > > > [1] https://lkml.iu.edu/hypermail/linux/kernel/2310.2/03035.html > > > > Yeah, Rob's request here looks valid to me. Should just be a bindings > > change Frank & fall back to the "silvaco,i3c-master-v1" compatible. > > > > Cheers, > > Conor. > > @shawn: > rob agree on "silvaco,i3c-master-v1" compatible. Hmm, not sure I have seen that. Here is what I saw from Rob: " The real problem here is not whether we have "v1" or not, but you need an SoC specific compatible. Unless there's a public spec where we can know exactly how many resets, clocks, interrupts, etc. " Shawn
On Wed, Dec 06, 2023 at 05:31:06PM +0800, Shawn Guo wrote: > On Wed, Dec 06, 2023 at 12:46:15AM -0500, Frank Li wrote: > > On Mon, Nov 27, 2023 at 09:35:39AM +0000, Conor Dooley wrote: > > > On Mon, Nov 27, 2023 at 10:21:40AM +0800, Shawn Guo wrote: > > > > On Thu, Nov 09, 2023 at 10:51:13AM -0500, Frank Li wrote: > > > > > On Tue, Oct 17, 2023 at 03:46:57PM -0400, Frank Li wrote: > > > > > > Add I3C1 and I3C2. > > > > > > > > > > > > Signed-off-by: Frank Li <Frank.Li@nxp.com> > > > > > > --- > > > > > > > > > > @Guo Shawn: > > > > > > > > > > Driver part already merged. > > > > > > > > > > Please pick up dts part > > > > > > > > Rob had a comment [1] about SoC specific compatible. That's not what we > > > > want? > > > > > > > > Shawn > > > > > > > > [1] https://lkml.iu.edu/hypermail/linux/kernel/2310.2/03035.html > > > > > > Yeah, Rob's request here looks valid to me. Should just be a bindings > > > change Frank & fall back to the "silvaco,i3c-master-v1" compatible. > > > > > > Cheers, > > > Conor. > > > > @shawn: > > rob agree on "silvaco,i3c-master-v1" compatible. > > Hmm, not sure I have seen that. Here is what I saw from Rob: > > " > The real problem here is not whether we have "v1" or not, but you need > an SoC specific compatible. Unless there's a public spec where we can > know exactly how many resets, clocks, interrupts, etc. > " @Rob: Previous existed binding doc is "silvaco,i3c-master-v1". So far this IP in our difference SOC have the same resets and clocks, and only one interrrupts. current existed i3c controller compatible string is snps,dw-i3c-master-1.00a cdns,i3c-master mipi-i3c-hci mipi-i3c-hci is standard. "snps", "cdns" are similar as prefix "silivaco". I think the same IP vendor and same IP version should have same resets, clocks, and interrupts. So far still not met exception yet. Frank > > Shawn
On Tue, Oct 17, 2023 at 03:46:57PM -0400, Frank Li wrote: > Add I3C1 and I3C2. > > Signed-off-by: Frank Li <Frank.Li@nxp.com> Applied, thanks!
diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi index 6f85a05ee7e1a..c6ad9ba9eb9af 100644 --- a/arch/arm64/boot/dts/freescale/imx93.dtsi +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi @@ -242,6 +242,19 @@ tpm2: pwm@44320000 { status = "disabled"; }; + i3c1: i3c-master@44330000 { + compatible = "silvaco,i3c-master-v1"; + reg = <0x44330000 0x10000>; + interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <3>; + #size-cells = <0>; + clocks = <&clk IMX93_CLK_BUS_AON>, + <&clk IMX93_CLK_I3C1_GATE>, + <&clk IMX93_CLK_I3C1_SLOW>; + clock-names = "pclk", "fast_clk", "slow_clk"; + status = "disabled"; + }; + lpi2c1: i2c@44340000 { compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c"; reg = <0x44340000 0x10000>; @@ -496,6 +509,19 @@ tpm6: pwm@42510000 { status = "disabled"; }; + i3c2: i3c-master@42520000 { + compatible = "silvaco,i3c-master-v1"; + reg = <0x42520000 0x10000>; + interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <3>; + #size-cells = <0>; + clocks = <&clk IMX93_CLK_BUS_WAKEUP>, + <&clk IMX93_CLK_I3C2_GATE>, + <&clk IMX93_CLK_I3C2_SLOW>; + clock-names = "pclk", "fast_clk", "slow_clk"; + status = "disabled"; + }; + lpi2c3: i2c@42530000 { compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c"; reg = <0x42530000 0x10000>;
Add I3C1 and I3C2. Signed-off-by: Frank Li <Frank.Li@nxp.com> --- Notes: Change from v1 to v2 - using compatible string silvaco,i3c-master-v1 arch/arm64/boot/dts/freescale/imx93.dtsi | 26 ++++++++++++++++++++++++ 1 file changed, 26 insertions(+)