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[35/75] media: imx: imx7-media-csi: Replace CSICR*_RESET_VAL with values

Message ID 20210105152852.5733-36-laurent.pinchart@ideasonboard.com (mailing list archive)
State New, archived
Headers show
Series media: imx: Miscellaneous fixes and cleanups for i.MX7 | expand

Commit Message

Laurent Pinchart Jan. 5, 2021, 3:28 p.m. UTC 
The CSICR*_RESET_VAL macros only obfuscate code. Use their value
directly, replacing the numerical value with the macros that describe
register bits.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
 drivers/staging/media/imx/imx7-media-csi.c | 11 +++--------
 1 file changed, 3 insertions(+), 8 deletions(-)
diff mbox series

Patch

diff --git a/drivers/staging/media/imx/imx7-media-csi.c b/drivers/staging/media/imx/imx7-media-csi.c
index 6f39f81274b5..e3dfca630d4c 100644
--- a/drivers/staging/media/imx/imx7-media-csi.c
+++ b/drivers/staging/media/imx/imx7-media-csi.c
@@ -32,11 +32,6 @@ 
 #define IMX7_CSI_PAD_SRC	1
 #define IMX7_CSI_PADS_NUM	2
 
-/* reset values */
-#define CSICR1_RESET_VAL	0x40000800
-#define CSICR2_RESET_VAL	0x0
-#define CSICR3_RESET_VAL	0x0
-
 /* csi control reg 1 */
 #define BIT_SWAP16_EN		BIT(31)
 #define BIT_EXT_VSYNC		BIT(30)
@@ -211,9 +206,9 @@  static void imx7_csi_hw_reset(struct imx7_csi *csi)
 			   imx7_csi_reg_read(csi, CSI_CSICR3) | BIT_FRMCNT_RST,
 			   CSI_CSICR3);
 
-	imx7_csi_reg_write(csi, CSICR1_RESET_VAL, CSI_CSICR1);
-	imx7_csi_reg_write(csi, CSICR2_RESET_VAL, CSI_CSICR2);
-	imx7_csi_reg_write(csi, CSICR3_RESET_VAL, CSI_CSICR3);
+	imx7_csi_reg_write(csi, BIT_EXT_VSYNC | BIT_HSYNC_POL, CSI_CSICR1);
+	imx7_csi_reg_write(csi, 0, CSI_CSICR2);
+	imx7_csi_reg_write(csi, 0, CSI_CSICR3);
 }
 
 static u32 imx7_csi_irq_clear(struct imx7_csi *csi)