| Message ID | 20220829080830.5378-4-chunfeng.yun@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2,1/7] dt-bindings: phy: mediatek,tphy: add support type of SGMII | expand |
Il 29/08/22 10:08, Chunfeng Yun ha scritto: > INTR's value is able autoload from hardware efuse by default, when > software tries to update its value, should disable hardware efuse > firstly. > > Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
diff --git a/drivers/phy/mediatek/phy-mtk-tphy.c b/drivers/phy/mediatek/phy-mtk-tphy.c index 986fde0f63a0..7f40b8b052bd 100644 --- a/drivers/phy/mediatek/phy-mtk-tphy.c +++ b/drivers/phy/mediatek/phy-mtk-tphy.c @@ -874,9 +874,14 @@ static void u2_phy_props_set(struct mtk_tphy *tphy, mtk_phy_update_bits(com + U3P_USBPHYACR1, PA1_RG_TERM_SEL, PA1_RG_TERM_SEL_VAL(instance->eye_term)); - if (instance->intr) + if (instance->intr) { + if (u2_banks->misc) + mtk_phy_set_bits(u2_banks->misc + U3P_MISC_REG1, + MR1_EFUSE_AUTO_LOAD_DIS); + mtk_phy_update_bits(com + U3P_USBPHYACR1, PA1_RG_INTR_CAL, PA1_RG_INTR_CAL_VAL(instance->intr)); + } if (instance->discth) mtk_phy_update_bits(com + U3P_USBPHYACR6, PA6_RG_U2_DISCTH,
INTR's value is able autoload from hardware efuse by default, when software tries to update its value, should disable hardware efuse firstly. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> --- v2: no changes --- drivers/phy/mediatek/phy-mtk-tphy.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-)