| Message ID | 20231215104551.233679-6-eugen.hristev@collabora.com (mailing list archive) |
|---|---|
| State | New |
| Delegated to: | Matthias Brugger |
| Headers | show |
| Series | [v2,1/7] media: mediatek: vcodec: fix possible unbalanced PM counter | expand |
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi index df0c04f2ba1d..66ead3f23336 100644 --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi @@ -1061,7 +1061,7 @@ power-domain@MT8186_POWER_DOMAIN_VENC { reg = <MT8186_POWER_DOMAIN_VENC>; clocks = <&topckgen CLK_TOP_VENC>, <&vencsys CLK_VENC_CKE1_VENC>; - clock-names = "venc0", "larb"; + clock-names = "venc0", "subsys-larb"; mediatek,infracfg = <&infracfg_ao>; #power-domain-cells = <0>; };
The larb clock is in fact a subsys clock, so it must be prefixed by 'subsys-' to be correctly identified in the driver. Fixes: d9e43c1e7a38 ("arm64: dts: mt8186: Add power domains controller") Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com> --- Changes in v2: - none. arch/arm64/boot/dts/mediatek/mt8186.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)