| Message ID | 1570015525-27018-6-git-send-email-zhouyanjie@zoho.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [1/5,v5] irqchip: ingenic: Drop redundant irq_suspend / irq_resume functions | expand |
Le mer., oct. 2, 2019 at 19:25, Zhou Yanjie <zhouyanjie@zoho.com> a écrit : > Add process for the situation that more than one irq is coming to > a single chip at the same time. The original code will only respond > to the lowest setted bit in JZ_REG_INTC_PENDING, and then exit the > interrupt dispatch function. After exiting the interrupt dispatch > function, since the second interrupt has not yet responded, the > interrupt dispatch function is again entered to process the second > interrupt. This creates additional unnecessary overhead, and the > more interrupts that occur at the same time, the more overhead is > added. The improved method in this patch is to check whether there > are still unresponsive interrupts after processing the lowest > setted bit interrupt. If there are any, the processing will be > processed according to the bit in JZ_REG_INTC_PENDING, and the > interrupt dispatch function will be exited until all processing > is completed. > > Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com> Looks good to me. Reviewed-by: Paul Cercueil <paul@crapouillou.net> > --- > drivers/irqchip/irq-ingenic.c | 17 +++++++++++------ > 1 file changed, 11 insertions(+), 6 deletions(-) > > diff --git a/drivers/irqchip/irq-ingenic.c > b/drivers/irqchip/irq-ingenic.c > index 06ab3ad..c1be3d5 100644 > --- a/drivers/irqchip/irq-ingenic.c > +++ b/drivers/irqchip/irq-ingenic.c > @@ -1,7 +1,7 @@ > // SPDX-License-Identifier: GPL-2.0-or-later > /* > * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de> > - * JZ4740 platform IRQ support > + * Ingenic XBurst platform IRQ support > */ > > #include <linux/errno.h> > @@ -37,18 +37,23 @@ static irqreturn_t intc_cascade(int irq, void > *data) > struct ingenic_intc_data *intc = irq_get_handler_data(irq); > struct irq_domain *domain = intc->domain; > struct irq_chip_generic *gc; > - uint32_t irq_reg; > + uint32_t pending; > unsigned i; > > for (i = 0; i < intc->num_chips; i++) { > gc = irq_get_domain_generic_chip(domain, i * 32); > > - irq_reg = irq_reg_readl(gc, JZ_REG_INTC_PENDING); > - if (!irq_reg) > + pending = irq_reg_readl(gc, JZ_REG_INTC_PENDING); > + if (!pending) > continue; > > - irq = irq_find_mapping(domain, __fls(irq_reg) + (i * 32)); > - generic_handle_irq(irq); > + while (pending) { > + int bit = __fls(pending); > + > + irq = irq_find_mapping(domain, bit + (i * 32)); > + generic_handle_irq(irq); > + pending &= ~BIT(bit); > + } > } > > return IRQ_HANDLED; > -- > 2.7.4 > >
diff --git a/drivers/irqchip/irq-ingenic.c b/drivers/irqchip/irq-ingenic.c index 06ab3ad..c1be3d5 100644 --- a/drivers/irqchip/irq-ingenic.c +++ b/drivers/irqchip/irq-ingenic.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-or-later /* * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de> - * JZ4740 platform IRQ support + * Ingenic XBurst platform IRQ support */ #include <linux/errno.h> @@ -37,18 +37,23 @@ static irqreturn_t intc_cascade(int irq, void *data) struct ingenic_intc_data *intc = irq_get_handler_data(irq); struct irq_domain *domain = intc->domain; struct irq_chip_generic *gc; - uint32_t irq_reg; + uint32_t pending; unsigned i; for (i = 0; i < intc->num_chips; i++) { gc = irq_get_domain_generic_chip(domain, i * 32); - irq_reg = irq_reg_readl(gc, JZ_REG_INTC_PENDING); - if (!irq_reg) + pending = irq_reg_readl(gc, JZ_REG_INTC_PENDING); + if (!pending) continue; - irq = irq_find_mapping(domain, __fls(irq_reg) + (i * 32)); - generic_handle_irq(irq); + while (pending) { + int bit = __fls(pending); + + irq = irq_find_mapping(domain, bit + (i * 32)); + generic_handle_irq(irq); + pending &= ~BIT(bit); + } } return IRQ_HANDLED;
Add process for the situation that more than one irq is coming to a single chip at the same time. The original code will only respond to the lowest setted bit in JZ_REG_INTC_PENDING, and then exit the interrupt dispatch function. After exiting the interrupt dispatch function, since the second interrupt has not yet responded, the interrupt dispatch function is again entered to process the second interrupt. This creates additional unnecessary overhead, and the more interrupts that occur at the same time, the more overhead is added. The improved method in this patch is to check whether there are still unresponsive interrupts after processing the lowest setted bit interrupt. If there are any, the processing will be processed according to the bit in JZ_REG_INTC_PENDING, and the interrupt dispatch function will be exited until all processing is completed. Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com> --- drivers/irqchip/irq-ingenic.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-)