| Message ID | 164298425711.3018233.16653457511648347954.stgit@dwillia2-desk3.amr.corp.intel.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 4112a08dd3c5ea0a96029f14061f2320826cfd32 |
| Headers | show |
| Series | CXL.mem Topology Discovery and Hotplug Support | expand |
On Sun, 23 Jan 2022 16:30:57 -0800 Dan Williams <dan.j.williams@intel.com> wrote: > From: Ben Widawsky <ben.widawsky@intel.com> > > In preparation for defining a cxl_port object to represent the decoder > resources of a memory expander capture the compont register base component > address. > > The port driver uses the component register base to enumerate the HDM > Decoder Capability structure. Unlike other cxl_port objects the endpoint > port decodes from upstream SPA to downstream DPA rather than upstream > port to downstream port. > > Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> > Reported-by: kernel test robot <lkp@intel.com> > [djbw: clarify changelog] > Signed-off-by: Dan Williams <dan.j.williams@intel.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> > --- > drivers/cxl/cxlmem.h | 3 +++ > drivers/cxl/pci.c | 11 +++++++++++ > 2 files changed, 14 insertions(+) > > diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h > index fca2d1b5f6ff..90d67fff5bed 100644 > --- a/drivers/cxl/cxlmem.h > +++ b/drivers/cxl/cxlmem.h > @@ -116,6 +116,7 @@ struct cxl_mbox_cmd { > * @active_persistent_bytes: sum of hard + soft persistent > * @next_volatile_bytes: volatile capacity change pending device reset > * @next_persistent_bytes: persistent capacity change pending device reset > + * @component_reg_phys: register base of component registers > * @mbox_send: @dev specific transport for transmitting mailbox commands > * > * See section 8.2.9.5.2 Capacity Configuration and Label Storage for > @@ -145,6 +146,8 @@ struct cxl_dev_state { > u64 next_volatile_bytes; > u64 next_persistent_bytes; > > + resource_size_t component_reg_phys; > + > int (*mbox_send)(struct cxl_dev_state *cxlds, struct cxl_mbox_cmd *cmd); > }; > > diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c > index c29d50660c21..e54dbdf9ac15 100644 > --- a/drivers/cxl/pci.c > +++ b/drivers/cxl/pci.c > @@ -416,6 +416,17 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) > if (rc) > return rc; > > + /* > + * If the component registers can't be found, the cxl_pci driver may > + * still be useful for management functions so don't return an error. > + */ > + cxlds->component_reg_phys = CXL_RESOURCE_NONE; > + rc = cxl_setup_regs(pdev, CXL_REGLOC_RBI_COMPONENT, &map); > + if (rc) > + dev_warn(&pdev->dev, "No component registers (%d)\n", rc); > + > + cxlds->component_reg_phys = cxl_regmap_to_base(pdev, &map); > + > rc = cxl_pci_setup_mailbox(cxlds); > if (rc) > return rc; >
diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h index fca2d1b5f6ff..90d67fff5bed 100644 --- a/drivers/cxl/cxlmem.h +++ b/drivers/cxl/cxlmem.h @@ -116,6 +116,7 @@ struct cxl_mbox_cmd { * @active_persistent_bytes: sum of hard + soft persistent * @next_volatile_bytes: volatile capacity change pending device reset * @next_persistent_bytes: persistent capacity change pending device reset + * @component_reg_phys: register base of component registers * @mbox_send: @dev specific transport for transmitting mailbox commands * * See section 8.2.9.5.2 Capacity Configuration and Label Storage for @@ -145,6 +146,8 @@ struct cxl_dev_state { u64 next_volatile_bytes; u64 next_persistent_bytes; + resource_size_t component_reg_phys; + int (*mbox_send)(struct cxl_dev_state *cxlds, struct cxl_mbox_cmd *cmd); }; diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c index c29d50660c21..e54dbdf9ac15 100644 --- a/drivers/cxl/pci.c +++ b/drivers/cxl/pci.c @@ -416,6 +416,17 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) if (rc) return rc; + /* + * If the component registers can't be found, the cxl_pci driver may + * still be useful for management functions so don't return an error. + */ + cxlds->component_reg_phys = CXL_RESOURCE_NONE; + rc = cxl_setup_regs(pdev, CXL_REGLOC_RBI_COMPONENT, &map); + if (rc) + dev_warn(&pdev->dev, "No component registers (%d)\n", rc); + + cxlds->component_reg_phys = cxl_regmap_to_base(pdev, &map); + rc = cxl_pci_setup_mailbox(cxlds); if (rc) return rc;