diff mbox

[06/12] omap: mailbox: Flush posted write when acking mailbox irq

Message ID 20090924233920.6065.16789.stgit@localhost (mailing list archive)
State Awaiting Upstream, archived
Headers show

Commit Message

Tony Lindgren Sept. 24, 2009, 11:39 p.m. UTC 
From: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>

The only way to flush posted write to L4 bus is to do a read back
of the same register right after the write.

This seems to be mostly needed in interrupt handlers to avoid
causing spurious interrupts.

The earlier fix has been to mark the L4 bus as strongly ordered
memory, which solves the problem, but causes performance penalties.

Similar to the fix, 03803a71041e3bc3c077f4e7b92f6ceaa9426df3

Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
 arch/arm/mach-omap2/mailbox.c |    3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)


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Comments

Artem Bityutskiy Sept. 25, 2009, 7:12 a.m. UTC | #1 
On 09/25/2009 02:39 AM, Tony Lindgren wrote:
> From: Hiroshi DOYU<Hiroshi.DOYU@nokia.com>
>
> The only way to flush posted write to L4 bus is to do a read back
> of the same register right after the write.

Just curious, is it really necessary to read back the _same_ register?
Would reading back any L4 bus-related register be sufficient?
Tony Lindgren Sept. 25, 2009, 3:51 p.m. UTC | #2 
* Artem Bityutskiy <dedekind1@gmail.com> [090925 00:15]:
> On 09/25/2009 02:39 AM, Tony Lindgren wrote:
>> From: Hiroshi DOYU<Hiroshi.DOYU@nokia.com>
>>
>> The only way to flush posted write to L4 bus is to do a read back
>> of the same register right after the write.
>
> Just curious, is it really necessary to read back the _same_ register?
> Would reading back any L4 bus-related register be sufficient?

It seems that reading back any register in the same device will do it.

Tony
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diff mbox

Patch

diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c
index 5bf9a2f..f3fefca 100644
--- a/arch/arm/mach-omap2/mailbox.c
+++ b/arch/arm/mach-omap2/mailbox.c
@@ -176,6 +176,9 @@  static void omap2_mbox_ack_irq(struct omap_mbox *mbox,
 	u32 bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit;
 
 	mbox_write_reg(bit, p->irqstatus);
+
+	/* Flush posted write for irq status to avoid spurious interrupts */
+	mbox_read_reg(p->irqstatus);
 }
 
 static int omap2_mbox_is_irq(struct omap_mbox *mbox,