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From: Krishna chaitanya chundru <quic_krichai@quicinc.com>
To: manivannan.sadhasivam@linaro.org
Cc: helgaas@kernel.org, linux-pci@vger.kernel.org,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
quic_vbadigan@quicinc.com, quic_nitegupt@quicinc.com,
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krzysztof.kozlowski@linaro.org,
Krishna chaitanya chundru <quic_krichai@quicinc.com>
Subject: [PATCH v9 0/4] PCI: qcom: ep: Add basic interconnect support
Date: Tue, 18 Jul 2023 20:50:41 +0530
Message-Id: <1689693645-28254-1-git-send-email-quic_krichai@quicinc.com>
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|
| Series | PCI: qcom: ep: Add basic interconnect support | expand |
Add basic support for managing "pcie-mem" interconnect path by setting a low constraint before enabling clocks and updating it after the link is up based on link speed and width the device got enumerated. changes from v8: - Added cpu to pcie path in dtsi and in dtsi binding. changes from v7: - setting icc bw to '0' in disable resources as suggested by mani. changes from v6: - addressed the comments as suggested by mani. changes from v5: - addressed the comments by mani. changes from v4: - rebased with linux-next. - Added comments as suggested by mani. - removed the arm: dts: qcom: sdx55: Add interconnect path as that patch is already applied. changes from v3: - ran make DT_CHECKER_FLAGS=-m dt_binding_check and fixed errors. - Added macros in the qcom ep driver patch as suggested by Dmitry changes from v2: - changed the logic for getting speed and width as suggested by bjorn. - fixed compilation errors. Krishna chaitanya chundru (4): dt-bindings: PCI: qcom: ep: Add interconnects path arm: dts: qcom: sdx65: Add PCIe interconnect path arm: dts: qcom: sdx55: Add CPU PCIe interconnect path PCI: qcom-ep: Add ICC bandwidth voting support .../devicetree/bindings/pci/qcom,pcie-ep.yaml | 15 +++++ arch/arm/boot/dts/qcom/qcom-sdx55.dtsi | 5 +- arch/arm/boot/dts/qcom/qcom-sdx65.dtsi | 4 ++ drivers/pci/controller/dwc/pcie-qcom-ep.c | 72 ++++++++++++++++++++++ 4 files changed, 94 insertions(+), 2 deletions(-)