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[v13,0/2] drivers/perf: hisi: Add support for PCIe PMU

Message ID 20211202080633.2919-1-liuqi115@huawei.com (mailing list archive)
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Series drivers/perf: hisi: Add support for PCIe PMU | expand

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liuqi (BA) Dec. 2, 2021, 8:06 a.m. UTC
This patchset adds support for HiSilicon PCIe Performance Monitoring
Unit(PMU). It is a PCIe Root Complex integrated End Point(RCiEP) device
added on Hip09. Each PCIe Core has a PMU RCiEP to monitor multi root
ports and all Endpoints downstream these root ports.

HiSilicon PCIe PMU is supported to collect performance data of PCIe bus,
such as: bandwidth, latency etc.

Example usage of counting PCIe rx memory write latency::

  $# perf stat -e hisi_pcie0_core0/rx_mwr_latency/
  $# perf stat -e hisi_pcie0_core0/rx_mwr_cnt/
  $# perf stat -g -e hisi_pcie0_core0/rx_mwr_latency/ -e hisi_pcie0_core0/rx_mwr_cnt/

average rx memory write latency can be calculated like this:
  latency = rx_mwr_latency / rx_mwr_cnt.

Common PMU events and metrics will be described in JSON file, and will be add
in userspace perf tool latter.

Changes since v12:
- Modify the printout message of cpuhotplug to standard.
- Link: https://lore.kernel.org/linux-arm-kernel/20211130120450.2747-1-liuqi115@huawei.com/

Changes since v11:
- Address the comments from Krzysztof, drop all the final dot and change bdf in comment to BDF.
- Link: https://lore.kernel.org/linux-arm-kernel/20211029093632.4350-1-liuqi115@huawei.com/

Changes since v10:
- Drop the out of date comment according to Jonathan's review.
- Link: https://lore.kernel.org/linux-arm-kernel/20210915074524.18040-1-liuqi115@huawei.com/

Changes since v9:
- Add check in hisi_pcie_pmu_validate_event_group to count counters accurently .
- Link: https://lore.kernel.org/linux-arm-kernel/20210818051246.29545-1-liuqi115@huawei.com/

Changes since v8:
- Remove subevent parameter in attr->config.
- Check the counter scheduling constraints when accepting an event group.
- Link: https://lore.kernel.org/linux-arm-kernel/20210728080932.72515-1-liuqi115@huawei.com/

Changes since v7:
- Drop headerfile cpumask.h and cpuhotplug.h.
- Rename events in perf list: bw->flux, lat->delay, as driver doesn't
  process bandwidth and average latency data.
- Link: https://lore.kernel.org/linux-arm-kernel/1624532384-43002-1-git-send-email-liuqi115@huawei.com/

Changes since v6:
- Move the driver to drivers/perf/hisilicon.
- Treat content in PMU counter and ext_counter as different PMU events, and
  export them separately.
- Address the comments from Will and Krzysztof.
- Link: https://lore.kernel.org/linux-arm-kernel/1622467951-32114-1-git-send-email-liuqi115@huawei.com/

Changes since v5:
- Fix some errors when build under ARCH=xtensa.
- Link: https://lore.kernel.org/linux-arm-kernel/1621946795-14046-1-git-send-email-liuqi115@huawei.com/

Changes since v4:
- Replace irq_set_affinity_hint() with irq_set_affinity().
- Link: https://lore.kernel.org/linux-arm-kernel/1621417741-5229-1-git-send-email-liuqi115@huawei.com/

Changes since v3:
- Fix some warnings when build under 32bits architecture.
- Address the comments from John.
- Link: https://lore.kernel.org/linux-arm-kernel/1618490885-44612-1-git-send-email-liuqi115@huawei.com/

Changes since v2:
- Address the comments from John.
- Link: https://lore.kernel.org/linux-arm-kernel/1617959157-22956-1-git-send-email-liuqi115@huawei.com/

Changes since v1:
- Drop the internal Reviewed-by tag.
- Fix some build warnings when W=1.
- Link: https://lore.kernel.org/linux-arm-kernel/1617788943-52722-1-git-send-email-liuqi115@huawei.com/
Qi Liu (2):
  docs: perf: Add description for HiSilicon PCIe PMU driver
  drivers/perf: hisi: Add driver for HiSilicon PCIe PMU

 .../admin-guide/perf/hisi-pcie-pmu.rst        | 106 ++
 MAINTAINERS                                   |   2 +
 drivers/perf/hisilicon/Kconfig                |   9 +
 drivers/perf/hisilicon/Makefile               |   2 +
 drivers/perf/hisilicon/hisi_pcie_pmu.c        | 948 ++++++++++++++++++
 include/linux/cpuhotplug.h                    |   1 +
 6 files changed, 1068 insertions(+)
 create mode 100644 Documentation/admin-guide/perf/hisi-pcie-pmu.rst
 create mode 100644 drivers/perf/hisilicon/hisi_pcie_pmu.c

Comments

Krzysztof WilczyƄski Dec. 2, 2021, 9:57 a.m. UTC | #1
Hi Qi,

[...]
> Changes since v12:
> - Modify the printout message of cpuhotplug to standard.
> - Link: https://lore.kernel.org/linux-arm-kernel/20211130120450.2747-1-liuqi115@huawei.com/
> 
> Changes since v11:
> - Address the comments from Krzysztof, drop all the final dot and change bdf in comment to BDF.
> - Link: https://lore.kernel.org/linux-arm-kernel/20211029093632.4350-1-liuqi115@huawei.com/
> 
> Changes since v10:
> - Drop the out of date comment according to Jonathan's review.
> - Link: https://lore.kernel.org/linux-arm-kernel/20210915074524.18040-1-liuqi115@huawei.com/
> 
> Changes since v9:
> - Add check in hisi_pcie_pmu_validate_event_group to count counters accurently .
> - Link: https://lore.kernel.org/linux-arm-kernel/20210818051246.29545-1-liuqi115@huawei.com/
> 
> Changes since v8:
> - Remove subevent parameter in attr->config.
> - Check the counter scheduling constraints when accepting an event group.
> - Link: https://lore.kernel.org/linux-arm-kernel/20210728080932.72515-1-liuqi115@huawei.com/
> 
> Changes since v7:
> - Drop headerfile cpumask.h and cpuhotplug.h.
> - Rename events in perf list: bw->flux, lat->delay, as driver doesn't
>   process bandwidth and average latency data.
> - Link: https://lore.kernel.org/linux-arm-kernel/1624532384-43002-1-git-send-email-liuqi115@huawei.com/
> 
> Changes since v6:
> - Move the driver to drivers/perf/hisilicon.
> - Treat content in PMU counter and ext_counter as different PMU events, and
>   export them separately.
> - Address the comments from Will and Krzysztof.
> - Link: https://lore.kernel.org/linux-arm-kernel/1622467951-32114-1-git-send-email-liuqi115@huawei.com/
> 
> Changes since v5:
> - Fix some errors when build under ARCH=xtensa.
> - Link: https://lore.kernel.org/linux-arm-kernel/1621946795-14046-1-git-send-email-liuqi115@huawei.com/
> 
> Changes since v4:
> - Replace irq_set_affinity_hint() with irq_set_affinity().
> - Link: https://lore.kernel.org/linux-arm-kernel/1621417741-5229-1-git-send-email-liuqi115@huawei.com/
> 
> Changes since v3:
> - Fix some warnings when build under 32bits architecture.
> - Address the comments from John.
> - Link: https://lore.kernel.org/linux-arm-kernel/1618490885-44612-1-git-send-email-liuqi115@huawei.com/
> 
> Changes since v2:
> - Address the comments from John.
> - Link: https://lore.kernel.org/linux-arm-kernel/1617959157-22956-1-git-send-email-liuqi115@huawei.com/
> 
> Changes since v1:
> - Drop the internal Reviewed-by tag.
> - Fix some build warnings when W=1.
> - Link: https://lore.kernel.org/linux-arm-kernel/1617788943-52722-1-git-send-email-liuqi115@huawei.com/
> Qi Liu (2):
>   docs: perf: Add description for HiSilicon PCIe PMU driver
>   drivers/perf: hisi: Add driver for HiSilicon PCIe PMU

Thank you!  Solid work here!  Much appreciated.

	Krzysztof
Shaokun Zhang Dec. 7, 2021, 7:50 a.m. UTC | #2
Hi Qi,

Thanks for your continuous and nice work, please free to add if it is necessary:

Reviewed-by: Shaokun Zhang <zhangshaokun@hisilicon.com>

Thanks,
Shaokun

On 2021/12/2 16:06, Qi Liu wrote:
> This patchset adds support for HiSilicon PCIe Performance Monitoring
> Unit(PMU). It is a PCIe Root Complex integrated End Point(RCiEP) device
> added on Hip09. Each PCIe Core has a PMU RCiEP to monitor multi root
> ports and all Endpoints downstream these root ports.
> 
> HiSilicon PCIe PMU is supported to collect performance data of PCIe bus,
> such as: bandwidth, latency etc.
> 
> Example usage of counting PCIe rx memory write latency::
> 
>   $# perf stat -e hisi_pcie0_core0/rx_mwr_latency/
>   $# perf stat -e hisi_pcie0_core0/rx_mwr_cnt/
>   $# perf stat -g -e hisi_pcie0_core0/rx_mwr_latency/ -e hisi_pcie0_core0/rx_mwr_cnt/
> 
> average rx memory write latency can be calculated like this:
>   latency = rx_mwr_latency / rx_mwr_cnt.
> 
> Common PMU events and metrics will be described in JSON file, and will be add
> in userspace perf tool latter.
> 
> Changes since v12:
> - Modify the printout message of cpuhotplug to standard.
> - Link: https://lore.kernel.org/linux-arm-kernel/20211130120450.2747-1-liuqi115@huawei.com/
> 
> Changes since v11:
> - Address the comments from Krzysztof, drop all the final dot and change bdf in comment to BDF.
> - Link: https://lore.kernel.org/linux-arm-kernel/20211029093632.4350-1-liuqi115@huawei.com/
> 
> Changes since v10:
> - Drop the out of date comment according to Jonathan's review.
> - Link: https://lore.kernel.org/linux-arm-kernel/20210915074524.18040-1-liuqi115@huawei.com/
> 
> Changes since v9:
> - Add check in hisi_pcie_pmu_validate_event_group to count counters accurently .
> - Link: https://lore.kernel.org/linux-arm-kernel/20210818051246.29545-1-liuqi115@huawei.com/
> 
> Changes since v8:
> - Remove subevent parameter in attr->config.
> - Check the counter scheduling constraints when accepting an event group.
> - Link: https://lore.kernel.org/linux-arm-kernel/20210728080932.72515-1-liuqi115@huawei.com/
> 
> Changes since v7:
> - Drop headerfile cpumask.h and cpuhotplug.h.
> - Rename events in perf list: bw->flux, lat->delay, as driver doesn't
>   process bandwidth and average latency data.
> - Link: https://lore.kernel.org/linux-arm-kernel/1624532384-43002-1-git-send-email-liuqi115@huawei.com/
> 
> Changes since v6:
> - Move the driver to drivers/perf/hisilicon.
> - Treat content in PMU counter and ext_counter as different PMU events, and
>   export them separately.
> - Address the comments from Will and Krzysztof.
> - Link: https://lore.kernel.org/linux-arm-kernel/1622467951-32114-1-git-send-email-liuqi115@huawei.com/
> 
> Changes since v5:
> - Fix some errors when build under ARCH=xtensa.
> - Link: https://lore.kernel.org/linux-arm-kernel/1621946795-14046-1-git-send-email-liuqi115@huawei.com/
> 
> Changes since v4:
> - Replace irq_set_affinity_hint() with irq_set_affinity().
> - Link: https://lore.kernel.org/linux-arm-kernel/1621417741-5229-1-git-send-email-liuqi115@huawei.com/
> 
> Changes since v3:
> - Fix some warnings when build under 32bits architecture.
> - Address the comments from John.
> - Link: https://lore.kernel.org/linux-arm-kernel/1618490885-44612-1-git-send-email-liuqi115@huawei.com/
> 
> Changes since v2:
> - Address the comments from John.
> - Link: https://lore.kernel.org/linux-arm-kernel/1617959157-22956-1-git-send-email-liuqi115@huawei.com/
> 
> Changes since v1:
> - Drop the internal Reviewed-by tag.
> - Fix some build warnings when W=1.
> - Link: https://lore.kernel.org/linux-arm-kernel/1617788943-52722-1-git-send-email-liuqi115@huawei.com/
> Qi Liu (2):
>   docs: perf: Add description for HiSilicon PCIe PMU driver
>   drivers/perf: hisi: Add driver for HiSilicon PCIe PMU
> 
>  .../admin-guide/perf/hisi-pcie-pmu.rst        | 106 ++
>  MAINTAINERS                                   |   2 +
>  drivers/perf/hisilicon/Kconfig                |   9 +
>  drivers/perf/hisilicon/Makefile               |   2 +
>  drivers/perf/hisilicon/hisi_pcie_pmu.c        | 948 ++++++++++++++++++
>  include/linux/cpuhotplug.h                    |   1 +
>  6 files changed, 1068 insertions(+)
>  create mode 100644 Documentation/admin-guide/perf/hisi-pcie-pmu.rst
>  create mode 100644 drivers/perf/hisilicon/hisi_pcie_pmu.c
>
Will Deacon Dec. 14, 2021, 2:04 p.m. UTC | #3
On Thu, 2 Dec 2021 16:06:31 +0800, Qi Liu wrote:
> This patchset adds support for HiSilicon PCIe Performance Monitoring
> Unit(PMU). It is a PCIe Root Complex integrated End Point(RCiEP) device
> added on Hip09. Each PCIe Core has a PMU RCiEP to monitor multi root
> ports and all Endpoints downstream these root ports.
> 
> HiSilicon PCIe PMU is supported to collect performance data of PCIe bus,
> such as: bandwidth, latency etc.
> 
> [...]

Applied to arm64 (for-next/perf-hisi), thanks!

[1/2] docs: perf: Add description for HiSilicon PCIe PMU driver
      https://git.kernel.org/arm64/c/c8602008e247
[2/2] drivers/perf: hisi: Add driver for HiSilicon PCIe PMU
      https://git.kernel.org/arm64/c/8404b0fbc7fb

Cheers,