| Message ID | 20220413233144.275926-1-dmitry.baryshkov@linaro.org (mailing list archive) |
|---|---|
| Headers | show |
| Series | PCI: qcom: rework pipe_clk/pipe_clk_src handling | expand |
On Thu, Apr 14, 2022 at 02:31:38AM +0300, Dmitry Baryshkov wrote: > PCIe pipe clk (and some other clocks) must be parked to the "safe" > source (bi_tcxo) when corresponding GDSC is turned off and on again. > Currently this is handcoded in the PCIe driver by reparenting the > gcc_pipe_N_clk_src clock. > > Instead of doing it manually, follow the approach used by > clk_rcg2_shared_ops and implement this parking in the enable() and > disable() clock operations for respective pipe clocks. Please take a look at the alternative approach of moving the pipe clock muxing into the PHY driver: https://lore.kernel.org/all/20220421102041.17345-1-johan+linaro@kernel.org/ The implementation is more straight forward and I believe it is also more conceptually sound as it ties the muxing to when the PHY is powered on so that the GCC pipe clock always has a valid source. Johan
On 21/04/2022 13:28, Johan Hovold wrote: > On Thu, Apr 14, 2022 at 02:31:38AM +0300, Dmitry Baryshkov wrote: >> PCIe pipe clk (and some other clocks) must be parked to the "safe" >> source (bi_tcxo) when corresponding GDSC is turned off and on again. >> Currently this is handcoded in the PCIe driver by reparenting the >> gcc_pipe_N_clk_src clock. >> >> Instead of doing it manually, follow the approach used by >> clk_rcg2_shared_ops and implement this parking in the enable() and >> disable() clock operations for respective pipe clocks. > > Please take a look at the alternative approach of moving the pipe clock > muxing into the PHY driver: > > https://lore.kernel.org/all/20220421102041.17345-1-johan+linaro@kernel.org/ > > The implementation is more straight forward and I believe it is also > more conceptually sound as it ties the muxing to when the PHY is powered > on so that the GCC pipe clock always has a valid source. I still have a slight preference for the automated variant: - Your code is manually doing exactly the same thing. Remuxing the clocks in connection to the GCC_PIPE_n_CLOCK enabling/disabling - DTS compatibility is preserved
PCIe pipe clk (and some other clocks) must be parked to the "safe" source (bi_tcxo) when corresponding GDSC is turned off and on again. Currently this is handcoded in the PCIe driver by reparenting the gcc_pipe_N_clk_src clock. Instead of doing it manually, follow the approach used by clk_rcg2_shared_ops and implement this parking in the enable() and disable() clock operations for respective pipe clocks. PCIe part depends on [1]. Changes since v2: - Added is_enabled() callback - Added default parent to the pipe clock configuration Changes since v1: - Rebased on top of [1]. - Removed erroneous Fixes tag from the patch 4. Changes since RFC: - Rework clk-regmap-mux fields. Specify safe parent as P_* value rather than specifying the register value directly - Expand commit message to the first patch to specially mention that it is required only on newer generations of Qualcomm chipsets. [1]: https://lore.kernel.org/all/20220401133351.10113-1-johan+linaro@kernel.org/ Dmitry Baryshkov (6): clk: qcom: add two parent_map helpers clk: qcom: regmap-mux: add pipe clk implementation clk: qcom: gcc-sm8450: use new clk_regmap_mux_safe_ops for PCIe pipe clocks clk: qcom: gcc-sc7280: use new clk_regmap_mux_safe_ops for PCIe pipe clocks PCI: qcom: Remove unnecessary pipe_clk handling PCI: qcom: Drop manual pipe_clk_src handling drivers/clk/qcom/clk-regmap-mux.c | 121 +++++++++++++++++++++++++ drivers/clk/qcom/clk-regmap-mux.h | 3 + drivers/clk/qcom/common.c | 24 +++++ drivers/clk/qcom/common.h | 5 + drivers/clk/qcom/gcc-sc7280.c | 8 +- drivers/clk/qcom/gcc-sm8450.c | 8 +- drivers/pci/controller/dwc/pcie-qcom.c | 81 +---------------- 7 files changed, 168 insertions(+), 82 deletions(-) base-commit: 3123109284176b1532874591f7c81f3837bbdc17 prerequisite-patch-id: 71e4b5b7ff5d87f2407735cc6a3074812cde3697