mbox series

[v2,0/1] PCI: qcom-ep: Fix the BAR size programming

Message ID 20231025130029.74693-1-manivannan.sadhasivam@linaro.org (mailing list archive)
Headers show
Series PCI: qcom-ep: Fix the BAR size programming | expand

Message

Manivannan Sadhasivam Oct. 25, 2023, 1 p.m. UTC
Hello,

This series fixes the issue seen on Qcom EP platforms implementing the DWC
core while setting the BAR size. Currently, whatever the BAR size getting
programmed through pci_epc_set_bar() on the EP side is not reflected on the
host side during enumeration.

Debugging that issue revealed that the DWC Spec mandates asserting the DBI
CS2 register in addition to DBI CS while programming some read only and
shadow registers. So on the Qcom EP platforms, the driver needs to assert
DBI_CS2 in ELBI region before writing DBI2 registers and deassert it once
done.

This is done by implementing the write_dbi2() callback exposed by the DWC
core driver in the Qcom PCIe EP driver.

This series has been tested on Qcom SM8450 based development platform.

- Mani

Changes in v2:

- Switch to write_dbi2() callback as suggested by Sergey

Manivannan Sadhasivam (1):
  PCI: qcom-ep: Implement write_dbi2() callback for writing DBI2
    registers properly

 drivers/pci/controller/dwc/pcie-qcom-ep.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

Comments

Krzysztof WilczyƄski Dec. 16, 2023, 9:29 p.m. UTC | #1
Hello,

> This series fixes the issue seen on Qcom EP platforms implementing the DWC
> core while setting the BAR size. Currently, whatever the BAR size getting
> programmed through pci_epc_set_bar() on the EP side is not reflected on the
> host side during enumeration.
> 
> Debugging that issue revealed that the DWC Spec mandates asserting the DBI
> CS2 register in addition to DBI CS while programming some read only and
> shadow registers. So on the Qcom EP platforms, the driver needs to assert
> DBI_CS2 in ELBI region before writing DBI2 registers and deassert it once
> done.
> 
> This is done by implementing the write_dbi2() callback exposed by the DWC
> core driver in the Qcom PCIe EP driver.
> 
> This series has been tested on Qcom SM8450 based development platform.

Applied to controller/qcom-ep, thank you!

[1/1] PCI: qcom-ep: Add dedicated callback for writing to DBI2 registers
      https://git.kernel.org/pci/pci/c/a07d2497ed65

	Krzysztof