| Message ID | 20240814-setback-rumbling-c6393c8f1a91@spud (mailing list archive) |
|---|---|
| Headers | show |
| Series | PCI: microchip: support using either instance 1 or 2 | expand |
On Wed, Aug 14, 2024 at 09:08:40AM +0100, Conor Dooley wrote: > From: Conor Dooley <conor.dooley@microchip.com> > > The current driver and binding for PolarFire SoC's PCI controller assume > that the root port instance in use is instance 1. The second reg > property constitutes the region encompassing both "control" and "bridge" > registers for both instances. In the driver, a fixed offset is applied to > find the base addresses for instance 1's "control" and "bridge" > registers. The BeagleV Fire uses root port instance 2, so something must > be done so that software can differentiate. This series splits the > second reg property in two, with dedicated "control" and "bridge" > entries so that either instance can be used. Just attempting to bump this patchset. It has gone over 2 months without response, and I am afraid it has completely fallen between the cracks. Thanks, Conor.
On Thu, Oct 24, 2024 at 10:38:11AM +0100, Conor Dooley wrote: > On Wed, Aug 14, 2024 at 09:08:40AM +0100, Conor Dooley wrote: > > From: Conor Dooley <conor.dooley@microchip.com> > > > > The current driver and binding for PolarFire SoC's PCI controller assume > > that the root port instance in use is instance 1. The second reg > > property constitutes the region encompassing both "control" and "bridge" > > registers for both instances. In the driver, a fixed offset is applied to > > find the base addresses for instance 1's "control" and "bridge" > > registers. The BeagleV Fire uses root port instance 2, so something must > > be done so that software can differentiate. This series splits the > > second reg property in two, with dedicated "control" and "bridge" > > entries so that either instance can be used. > > Just attempting to bump this patchset. It has gone over 2 months without > response, and I am afraid it has completely fallen between the cracks. Thanks for bumping this. It looks pretty straightforward to me, so if nobody acts on it soon, I'll pick it up. Bjorn
Hello, > The current driver and binding for PolarFire SoC's PCI controller assume > that the root port instance in use is instance 1. The second reg > property constitutes the region encompassing both "control" and "bridge" > registers for both instances. In the driver, a fixed offset is applied to > find the base addresses for instance 1's "control" and "bridge" > registers. The BeagleV Fire uses root port instance 2, so something must > be done so that software can differentiate. This series splits the > second reg property in two, with dedicated "control" and "bridge" > entries so that either instance can be used. Applied to controller/microchip, thank you! [01/02] PCI: dt-bindings: PCI: microchip,pcie-host: Fix reg properties https://git.kernel.org/pci/pci/c/ae5ebdb405dd [02/02] PCI: microchip: Rework reg region handing to support using either instance 1 or 2 https://git.kernel.org/pci/pci/c/e071e6bd9940 Krzysztof
From: Conor Dooley <conor.dooley@microchip.com> The current driver and binding for PolarFire SoC's PCI controller assume that the root port instance in use is instance 1. The second reg property constitutes the region encompassing both "control" and "bridge" registers for both instances. In the driver, a fixed offset is applied to find the base addresses for instance 1's "control" and "bridge" registers. The BeagleV Fire uses root port instance 2, so something must be done so that software can differentiate. This series splits the second reg property in two, with dedicated "control" and "bridge" entries so that either instance can be used. Cheers, Conor. v5: - rebase on top of 6.11-rc1, which brought about a lot of driver change due to the plda common driver creation - although little actually changed in terms of the lines edited in this patch. v4: - fix a cocci warning reported off list about an inconsistent variable used between IS_ERR() and PTR_ERR() calls. v3: - rename a variable in probe s/axi/apb/ v2: - try the new reg format before the old one to avoid warnings in the good case - reword $subject for 2/2 CC: Daire McNamara <daire.mcnamara@microchip.com> CC: Lorenzo Pieralisi <lpieralisi@kernel.org> CC: Krzysztof Wilczyński <kw@linux.com> CC: Rob Herring <robh@kernel.org> CC: Bjorn Helgaas <bhelgaas@google.com> CC: Krzysztof Kozlowski <krzk+dt@kernel.org> CC: Conor Dooley <conor+dt@kernel.org> CC: linux-pci@vger.kernel.org CC: devicetree@vger.kernel.org CC: linux-kernel@vger.kernel.org CC: linux-riscv@lists.infradead.org Conor Dooley (2): dt-bindings: PCI: microchip,pcie-host: fix reg properties PCI: microchip: rework reg region handing to support using either instance 1 or 2 .../bindings/pci/microchip,pcie-host.yaml | 11 +- .../pci/plda,xpressrich3-axi-common.yaml | 14 ++- .../bindings/pci/starfive,jh7110-pcie.yaml | 7 ++ .../pci/controller/plda/pcie-microchip-host.c | 116 +++++++++--------- 4 files changed, 87 insertions(+), 61 deletions(-)