[v4,0/5] x86/PCI: Improve $PIR and add $IRT PIRQ routing support

Message

Maciej W. Rozycki March 31, 2022, 7:10 a.m. UTC

Hi,

 This is an updated patch series with a fix applied to what is now 3/5 for 
a bug that was reported by Dmitry (thanks!) having triggered with his 
x86-64 setup and then nailed down by Linus (also thanks!).  Additionally 
as suggested by Linus a fix has been added, for a preexisting problem with 
the routing table not being verified to stay whole within the BIOS memory 
range, that has become 1/5, expanding the whole series from 4 to 5 changes 
now.  In the course of that addition a couple of coding style issues have 
been consumed, shrinking what has now become 5/5.  The cover letter has 
been updated accordingly throughout.

 First 1/5 handles $PIR PIRQ routing tables that lack router device
information, fixing the inability to route interrupts with a system using 
the SiS85C497 ISA bridge.

 Then 2/5 adds support for the $IRT PIRQ routing table format invented by 
AMI before Microsoft has come up with its own $PIR format.  These formats 
are very similar to each other, but the $IRT format does not provide for 
router device information, so this change relies on 1/5.  It has turned 
out needed to route interrupts with a system using the ALi M1487 ISA Bus 
Controller device, discussed earlier on in a discussion thread around: 
<https://lore.kernel.org/linux-pci/[e-mail]/>.  This 
change has been verified with an artificially created $IRT table.

 Then 3/5 adds a range check for 

 Then 3/4 corrects our link value interpretation for said M1487 device 
according to Nikolai's findings with his system reported here: 
<https://lore.kernel.org/linux-pci/[e-mail]/>.

 Finally 4/4 corrects a couple of coding style issues around though not 
immediately within code changed by 2/4 so as to make the style consistent.

 See individual change descriptions for further details.

 Credit to Michal (cc-ed) for helping me chase documentation for the
$IRT table format.

 Please apply.

  Maciej