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[v3,0/4] PCI: Rework error reporting with PCIe failed link retraining

Message ID alpine.DEB.2.21.2408251354540.30766@angie.orcam.me.uk (mailing list archive)
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Series PCI: Rework error reporting with PCIe failed link retraining | expand

Message

Maciej W. Rozycki Aug. 25, 2024, 1:47 p.m. UTC 
Hi,

 This is a minor update to the patch series posted here: 
<https://lore.kernel.org/r/alpine.DEB.2.21.2408091017050.61955@angie.orcam.me.uk> 
which includes a change to 2/4 suggested by Ilpo to wait on LT rather than 
DLLLA with the recovery call to `pcie_retrain_link' in the failure path, 
so as to avoid an excessive delay where we expect training to fail anyway.

 This patch series addresses issues observed by Ilpo as reported here: 
<https://lore.kernel.org/r/aa2d1c4e-9961-d54a-00c7-ddf8e858a9b0@linux.intel.com/>, 
one with excessive delays happening when `pcie_failed_link_retrain' is 
called, but link retraining has not been actually attempted, and another 
one with an API misuse caused by a merge mistake.

 It also addresses an issue observed by Matthew as discussed here: 
<https://lore.kernel.org/r/20240806000659.30859-1-mattc@purestorage.com/> 
and here: 
<https://lore.kernel.org/r/20240722193407.23255-1-mattc@purestorage.com/>. 
where a stale LBMS bit state causes `pcie_failed_link_retrain', in the 
absence of a downstream device, to leave the link stuck at the 2.5GT/s 
speed rate, which then negatively impacts devices plugged in in the 
future.

 See individual change descriptions for further details.

 Original submission at:
<https://lore.kernel.org/r/alpine.DEB.2.21.2402092125070.2376@angie.orcam.me.uk/>.

  Maciej