diff mbox

PCI: fixup __pci_read_base() after refactoring

Message ID 1416310271-4423-1-git-send-email-thomas.petazzoni@free-electrons.com (mailing list archive)
State New, archived
Delegated to: Bjorn Helgaas
Headers show

Commit Message

Thomas Petazzoni Nov. 18, 2014, 11:31 a.m. UTC
In commit 7ea945f0bb49 ("PCI: Shrink decoding-disabled window while
sizing BARs"), Myron Stowe refactored the code of __pci_read_base() in
order to reduce the amount of time spent with decoding disabled.

However, contrary to what was said in the commit log, the commit does
introduce some functional change: the pci_size() function that used to
be called *before* the BAR size check is done is now called *after*
the BAR size check is done.

This causes some failures on certain platforms (namely ARM Marvell EBU
platforms, equipped for example with a PCIe SATA card, or a PCIe USB3
XHCI controller):

pci 0000:03:00.0: reg 0x10: can't handle BAR larger than 4GB (size 0xfffffffffff00000)

This problem didn't exist before this commit, due to pci_size() being
called before doing the PCI BAR size check. Therefore, this commit
fixes the problem by restoring the initial order of the operation, by
calling pci_size() before doing the PCI BAR size check.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Fixes: 7ea945f0bb49 ("PCI: Shrink decoding-disabled window while sizing BARs")
---
Note: this fix has been tested to work correctly for me, and the PCI
messages I get are now identical to the ones I was getting with
3.18-rc5. However, please review my patch carefully, as I must admit I
do not fully understand all the implications of the change as well as
the code in __pci_read_base().

Applies on top of pci/next

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
 drivers/pci/probe.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

Comments

Thierry Reding Nov. 18, 2014, 4:31 p.m. UTC | #1
On Tue, Nov 18, 2014 at 12:31:11PM +0100, Thomas Petazzoni wrote:
> In commit 7ea945f0bb49 ("PCI: Shrink decoding-disabled window while
> sizing BARs"), Myron Stowe refactored the code of __pci_read_base() in
> order to reduce the amount of time spent with decoding disabled.
> 
> However, contrary to what was said in the commit log, the commit does
> introduce some functional change: the pci_size() function that used to
> be called *before* the BAR size check is done is now called *after*
> the BAR size check is done.
> 
> This causes some failures on certain platforms (namely ARM Marvell EBU
> platforms, equipped for example with a PCIe SATA card, or a PCIe USB3
> XHCI controller):
> 
> pci 0000:03:00.0: reg 0x10: can't handle BAR larger than 4GB (size 0xfffffffffff00000)
> 
> This problem didn't exist before this commit, due to pci_size() being
> called before doing the PCI BAR size check. Therefore, this commit
> fixes the problem by restoring the initial order of the operation, by
> calling pci_size() before doing the PCI BAR size check.
> 
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> Fixes: 7ea945f0bb49 ("PCI: Shrink decoding-disabled window while sizing BARs")
> ---
> Note: this fix has been tested to work correctly for me, and the PCI
> messages I get are now identical to the ones I was getting with
> 3.18-rc5. However, please review my patch carefully, as I must admit I
> do not fully understand all the implications of the change as well as
> the code in __pci_read_base().
> 
> Applies on top of pci/next
> 
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> ---
>  drivers/pci/probe.c | 16 ++++++++--------
>  1 file changed, 8 insertions(+), 8 deletions(-)

I started seeing this same issue on Tegra today and I can confirm that
this patch fixes this regression:

Tested-by: Thierry Reding <treding@nvidia.com>
Kevin Hilman Nov. 18, 2014, 5:37 p.m. UTC | #2
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> writes:

> In commit 7ea945f0bb49 ("PCI: Shrink decoding-disabled window while
> sizing BARs"), Myron Stowe refactored the code of __pci_read_base() in
> order to reduce the amount of time spent with decoding disabled.
>
> However, contrary to what was said in the commit log, the commit does
> introduce some functional change: the pci_size() function that used to
> be called *before* the BAR size check is done is now called *after*
> the BAR size check is done.
>
> This causes some failures on certain platforms (namely ARM Marvell EBU
> platforms, equipped for example with a PCIe SATA card, or a PCIe USB3
> XHCI controller):
>
> pci 0000:03:00.0: reg 0x10: can't handle BAR larger than 4GB (size 0xfffffffffff00000)
>
> This problem didn't exist before this commit, due to pci_size() being
> called before doing the PCI BAR size check. Therefore, this commit
> fixes the problem by restoring the initial order of the operation, by
> calling pci_size() before doing the PCI BAR size check.
>

> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> Fixes: 7ea945f0bb49 ("PCI: Shrink decoding-disabled window while sizing BARs")

I also boot tested this on armada-370-mirabox (multi_v7_defconfig and
mvebu_v7_defconfig) where I originally noticed the problem, and it's
booting fine again.

Tested-by: Kevin Hilman <khilman@linaro.org>

and, you forgot something:  ;)

Reported-by: Kevin Hilman <khilman@linaro.org>

Kevin
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Bjorn Helgaas Nov. 19, 2014, 10:14 p.m. UTC | #3
On Tue, Nov 18, 2014 at 12:31:11PM +0100, Thomas Petazzoni wrote:
> In commit 7ea945f0bb49 ("PCI: Shrink decoding-disabled window while
> sizing BARs"), Myron Stowe refactored the code of __pci_read_base() in
> order to reduce the amount of time spent with decoding disabled.
> 
> However, contrary to what was said in the commit log, the commit does
> introduce some functional change: the pci_size() function that used to
> be called *before* the BAR size check is done is now called *after*
> the BAR size check is done.
> 
> This causes some failures on certain platforms (namely ARM Marvell EBU
> platforms, equipped for example with a PCIe SATA card, or a PCIe USB3
> XHCI controller):
> 
> pci 0000:03:00.0: reg 0x10: can't handle BAR larger than 4GB (size 0xfffffffffff00000)
> 
> This problem didn't exist before this commit, due to pci_size() being
> called before doing the PCI BAR size check. Therefore, this commit
> fixes the problem by restoring the initial order of the operation, by
> calling pci_size() before doing the PCI BAR size check.
> 
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> Fixes: 7ea945f0bb49 ("PCI: Shrink decoding-disabled window while sizing BARs")
> ---
> Note: this fix has been tested to work correctly for me, and the PCI
> messages I get are now identical to the ones I was getting with
> 3.18-rc5. However, please review my patch carefully, as I must admit I
> do not fully understand all the implications of the change as well as
> the code in __pci_read_base().
> 
> Applies on top of pci/next
> 
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

I folded essentially this patch into "PCI: Shrink decoding-disabled window
while sizing BARs" and re-merged that into my "next" branch.  Thanks!

Bjorn

> ---
>  drivers/pci/probe.c | 16 ++++++++--------
>  1 file changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
> index db16678..6168ca1 100644
> --- a/drivers/pci/probe.c
> +++ b/drivers/pci/probe.c
> @@ -246,6 +246,14 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
>  	if (!sz64)
>  		goto fail;
>  
> +	sz64 = pci_size(l64, sz64, mask64);
> +
> +	if (!sz64) {
> +		dev_info(&dev->dev, "%sreg 0x%x: invalid BAR (can't size)\n",
> +			 FW_BUG, pos);
> +		goto fail;
> +	}
> +
>  	if (res->flags & IORESOURCE_MEM_64) {
>  		if ((sizeof(dma_addr_t) < 8 || sizeof(resource_size_t) < 8) &&
>  		    sz64 > 0x100000000ULL) {
> @@ -268,14 +276,6 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
>  		}
>  	}
>  
> -	sz64 = pci_size(l64, sz64, mask64);
> -
> -	if (!sz64) {
> -		dev_info(&dev->dev, "%sreg 0x%x: invalid BAR (can't size)\n",
> -			 FW_BUG, pos);
> -		goto fail;
> -	}
> -
>  	region.start = l64;
>  	region.end = l64 + sz64;
>  
> -- 
> 2.1.0
> 
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diff mbox

Patch

diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index db16678..6168ca1 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -246,6 +246,14 @@  int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
 	if (!sz64)
 		goto fail;
 
+	sz64 = pci_size(l64, sz64, mask64);
+
+	if (!sz64) {
+		dev_info(&dev->dev, "%sreg 0x%x: invalid BAR (can't size)\n",
+			 FW_BUG, pos);
+		goto fail;
+	}
+
 	if (res->flags & IORESOURCE_MEM_64) {
 		if ((sizeof(dma_addr_t) < 8 || sizeof(resource_size_t) < 8) &&
 		    sz64 > 0x100000000ULL) {
@@ -268,14 +276,6 @@  int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
 		}
 	}
 
-	sz64 = pci_size(l64, sz64, mask64);
-
-	if (!sz64) {
-		dev_info(&dev->dev, "%sreg 0x%x: invalid BAR (can't size)\n",
-			 FW_BUG, pos);
-		goto fail;
-	}
-
 	region.start = l64;
 	region.end = l64 + sz64;