| Message ID | 1462850155-13790-2-git-send-email-jonathan.yong@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Delegated to: | Bjorn Helgaas |
| Headers | show |
Hello! > Section 7.32 Precision Time Management (or Measurement) from the > PCI Express Base 3.1 specification is an optional Extended Capability > for discovering and controlling the distribution of a PTM Hierarchy. Thanks, applied. Could you please provide a test case, similar to those in tests/* ? Have a nice fortnight
On 05/14/2016 17:24, Martin Mares wrote: > Hello! > >> Section 7.32 Precision Time Management (or Measurement) from the >> PCI Express Base 3.1 specification is an optional Extended Capability >> for discovering and controlling the distribution of a PTM Hierarchy. > > Thanks, applied. > > Could you please provide a test case, similar to those in tests/* ? > > Have a nice fortnight > Hi, How do I generate those? Looks like a dump of lspci -vvnnxxxx against a specific device. -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi! > How do I generate those? Looks like a dump of lspci -vvnnxxxx > against a specific device. It's exactly that :) Martin -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/lib/header.h b/lib/header.h index b8f7dc1..8463641 100644 --- a/lib/header.h +++ b/lib/header.h @@ -230,6 +230,7 @@ #define PCI_EXT_CAP_ID_LTR 0x18 /* Latency Tolerance Reporting */ #define PCI_EXT_CAP_ID_PASID 0x1b /* Process Address Space ID */ #define PCI_EXT_CAP_ID_L1PM 0x1e /* L1 PM Substates */ +#define PCI_EXT_CAP_ID_PTM 0x1f /* Precision Time Measurement */ /*** Definitions of capabilities ***/ diff --git a/ls-ecaps.c b/ls-ecaps.c index 8298435..0273240 100644 --- a/ls-ecaps.c +++ b/ls-ecaps.c @@ -548,6 +548,65 @@ cap_l1pm(struct device *d, int where) } } +static void +cap_ptm(struct device *d, int where) +{ + u32 buff; + u16 clock; + + printf("Precision Time Measurement\n"); + + if (verbose < 2) + return; + + if (!config_fetch(d, where + 4, 8)) + { + printf("\t\t<unreadable>\n"); + return; + } + + buff = get_conf_long(d, where + 4); + printf("\t\tPTMCap: "); + printf("Requester:%c Responder:%c Root:%c\n", + FLAG(buff, 0x1), + FLAG(buff, 0x2), + FLAG(buff, 0x4)); + + clock = BITS(buff, 8, 8); + printf("\t\tPTMClockGranularity: "); + switch (clock) + { + case 0x00: + printf("Unimplemented\n"); + break; + case 0xff: + printf("Greater than 254ns\n"); + break; + default: + printf("%huns\n", clock); + } + + buff = get_conf_long(d, where + 8); + printf("\t\tPTMControl: "); + printf("Enabled:%c RootSelected:%c\n", + FLAG(buff, 0x1), + FLAG(buff, 0x2)); + + clock = BITS(buff, 8, 8); + printf("\t\tPTMEffectiveGranularity: "); + switch (clock) + { + case 0x00: + printf("Unknown\n"); + break; + case 0xff: + printf("Greater than 254ns\n"); + break; + default: + printf("%huns\n", clock); + } +} + void show_ext_caps(struct device *d) { @@ -635,6 +694,9 @@ show_ext_caps(struct device *d) case PCI_EXT_CAP_ID_L1PM: cap_l1pm(d, where); break; + case PCI_EXT_CAP_ID_PTM: + cap_ptm(d, where); + break; default: printf("#%02x\n", id); break;
Section 7.32 Precision Time Management (or Measurement) from the PCI Express Base 3.1 specification is an optional Extended Capability for discovering and controlling the distribution of a PTM Hierarchy. Signed-off-by: Yong, Jonathan <jonathan.yong@intel.com> --- lib/header.h | 1 + ls-ecaps.c | 62 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 63 insertions(+)