@@ -28,6 +28,10 @@
#define PCIBIOS_MIN_IO 0x1000
#define PCIBIOS_MIN_MEM 0x10000000
+#ifdef CONFIG_PPC_POWERNV
+#define PCIBIOS_DEFAULT_ALIGNMENT PAGE_SIZE
+#endif
+
struct pci_dev;
/* Values for the `which' argument to sys_pciconfig_iobase syscall. */
@@ -4761,6 +4761,10 @@ static resource_size_t pci_specified_resource_alignment(struct pci_dev *dev,
char *p;
bool invalid = false;
+#ifdef PCIBIOS_DEFAULT_ALIGNMENT
+ align = PCIBIOS_DEFAULT_ALIGNMENT;
+ *resize = false;
+#endif
spin_lock(&resource_alignment_lock);
p = resource_alignment_param;
if (pci_has_flag(PCI_PROBE_ONLY)) {
Now we can use something like "pci=resource_alignment=*:*:*.*:noresize" to enforce the alignment of all MMIO BARs to be at least PAGE_SIZE so that we can passthrough sub-page(size < PAGE_SIZE) BARs to guest in VFIO module. But sometimes we may want to enable this feature by default on some platforms such as PowerNV platform which would easily see those sub-page BARs because of its 64K page. To achieve that, we add a macro PCIBIOS_DEFAULT_ALIGNMENT to set default alignment for all PCI devices and define it on PowerNV platform. Signed-off-by: Yongji Xie <xyjxie@linux.vnet.ibm.com> --- arch/powerpc/include/asm/pci.h | 4 ++++ drivers/pci/pci.c | 4 ++++ 2 files changed, 8 insertions(+)