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[v7,1/2] PCI: quirks: Set Cavium ACS capability quirk flags to assert RR/CR/SV/UF.

Message ID 1508244459-2615-2-git-send-email-Vadim.Lomovtsev@caviumnetworks.com (mailing list archive)
State New, archived
Delegated to: Bjorn Helgaas
Headers show

Commit Message

Vadim Lomovtsev Oct. 17, 2017, 12:47 p.m. UTC 
From: Vadim Lomovtsev <Vadim.Lomovtsev@cavium.com>

The Cavium ThunderX (CN8XXX) family PCIe Root Ports has limited PCI
capabilities in terms of no ACS support advertisement. However,
the RTL internally implements similar protection as if ACS had
completion/request redirection, upstream forwarding and validation
features enabled.

This commit changes Cavium ACS capabilities quirk flags accordingly.

Signed-off-by: Vadim Lomovtsev <Vadim.Lomovtsev@cavium.com>
---
 drivers/pci/quirks.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)
diff mbox

Patch

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index a4d33619a7bb..5e0e83304fda 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -4214,12 +4214,13 @@  static int pci_quirk_amd_sb_acs(struct pci_dev *dev, u16 acs_flags)
 static int pci_quirk_cavium_acs(struct pci_dev *dev, u16 acs_flags)
 {
 	/*
-	 * Cavium devices matching this quirk do not perform peer-to-peer
-	 * with other functions, allowing masking out these bits as if they
-	 * were unimplemented in the ACS capability.
+	 * The Cavium downstream ports doesn't advertise their ACS capability
+	 * registers. However, the RTL internally implements similar protection
+	 * as if ACS had completion redirection, forwarding and validation
+	 * features enabled. So by this flags we're asserting that the hardware
+	 * implements and enables equivalent ACS functionality for these flags.
 	 */
-	acs_flags &= ~(PCI_ACS_SV | PCI_ACS_TB | PCI_ACS_RR |
-		       PCI_ACS_CR | PCI_ACS_UF | PCI_ACS_DT);
+	acs_flags &= ~(PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_SV | PCI_ACS_UF);
 
 	if (!((dev->device >= 0xa000) && (dev->device <= 0xa0ff)))
 		return -ENOTTY;