| Message ID | 1533141889-19962-4-git-send-email-bharat.kumar.gogada@xilinx.com (mailing list archive) |
|---|---|
| State | New, archived |
| Delegated to: | Bjorn Helgaas |
| Headers | show |
| Series | Use xilinx controller irq for AER handler | expand |
On 8/1/2018 9:44 AM, Bharat Kumar Gogada wrote: > Xilinx ZynqMP PS PCIe does not report AER interrupts using Advanced > Error Interrupt Message Number. The controller has dedicated interrupt line > for reporting PCIe errors along with AER. > > Using dedicated controller irq number for AER which is shared with misc > interrupt handler in pcie-xilinx-nwl. This irq number is set > using PCI quirk. > > Signed-off-by: Bharat Kumar Gogada<bharat.kumar.gogada@xilinx.com> > --- > drivers/pci/pcie/portdrv_core.c | 4 ++++ > 1 files changed, 4 insertions(+), 0 deletions(-) > > diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c > index e0261ad..fa9150e 100644 > --- a/drivers/pci/pcie/portdrv_core.c > +++ b/drivers/pci/pcie/portdrv_core.c > @@ -264,6 +264,10 @@ static int pcie_device_init(struct pci_dev *pdev, int service, int irq) > int retval; > struct pcie_device *pcie; > struct device *device; > +#if defined(CONFIG_ARCH_ZYNQMP) && defined(CONFIG_PCIE_XILINX_NWL) > + if (service == PCIE_PORT_SERVICE_AER && pdev->sysdata) > + irq = *(int *)pdev->sysdata; > +#endif > I remember seeing a similar patch before. The patch above looks ugly to be honest. Need to find a way to generalize this. Can you search the mailing list archive to find out what the history is?
On Wed, Aug 01, 2018 at 11:05:09AM -0700, Sinan Kaya wrote: > On 8/1/2018 9:44 AM, Bharat Kumar Gogada wrote: > > Xilinx ZynqMP PS PCIe does not report AER interrupts using Advanced > > Error Interrupt Message Number. The controller has dedicated interrupt line > > for reporting PCIe errors along with AER. > > > > Using dedicated controller irq number for AER which is shared with misc > > interrupt handler in pcie-xilinx-nwl. This irq number is set > > using PCI quirk. > > > > Signed-off-by: Bharat Kumar Gogada<bharat.kumar.gogada@xilinx.com> > > --- > > drivers/pci/pcie/portdrv_core.c | 4 ++++ > > 1 files changed, 4 insertions(+), 0 deletions(-) > > > > diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c > > index e0261ad..fa9150e 100644 > > --- a/drivers/pci/pcie/portdrv_core.c > > +++ b/drivers/pci/pcie/portdrv_core.c > > @@ -264,6 +264,10 @@ static int pcie_device_init(struct pci_dev *pdev, int service, int irq) > > int retval; > > struct pcie_device *pcie; > > struct device *device; > > +#if defined(CONFIG_ARCH_ZYNQMP) && defined(CONFIG_PCIE_XILINX_NWL) > > + if (service == PCIE_PORT_SERVICE_AER && pdev->sysdata) > > + irq = *(int *)pdev->sysdata; > > +#endif > > I remember seeing a similar patch before. Are you thinking of [1]? > The patch above looks ugly to be honest. Need to find a way to > generalize this. Can you search the mailing list archive to find out > what the history is? I agree, the patch above is too ugly as-is because (a) it puts very arch-specific code in a generic code path and (b) it uses a compile-time test, which means it probably breaks generic arm64 kernels that contain support for several platforms. We also need to know whether this is a hardware defect or just something that is allowed by the spec but Linux doesn't support yet. The diagram in PCIe r4.0, sec 6.2.6, does leave room for MSI, MSI-X, INTx, and platform-specific interrupt schemes. [1] https://lkml.kernel.org/r/1464242406-20203-1-git-send-email-po.liu@nxp.com
On 8/6/2018 4:56 PM, Bjorn Helgaas wrote: >> I remember seeing a similar patch before. > Are you thinking of [1]? > yup.
> Subject: Re: [PATCH 3/3] PCI/portdrv: Add support for sharing xilinx > controller irq with AER > > On Wed, Aug 01, 2018 at 11:05:09AM -0700, Sinan Kaya wrote: > > On 8/1/2018 9:44 AM, Bharat Kumar Gogada wrote: > > > Xilinx ZynqMP PS PCIe does not report AER interrupts using Advanced > > > Error Interrupt Message Number. The controller has dedicated > > > interrupt line for reporting PCIe errors along with AER. > > > > > > Using dedicated controller irq number for AER which is shared with > > > misc interrupt handler in pcie-xilinx-nwl. This irq number is set > > > using PCI quirk. > > > > > > Signed-off-by: Bharat Kumar Gogada<bharat.kumar.gogada@xilinx.com> > > > --- > > > drivers/pci/pcie/portdrv_core.c | 4 ++++ > > > 1 files changed, 4 insertions(+), 0 deletions(-) > > > > > > diff --git a/drivers/pci/pcie/portdrv_core.c > > > b/drivers/pci/pcie/portdrv_core.c index e0261ad..fa9150e 100644 > > > --- a/drivers/pci/pcie/portdrv_core.c > > > +++ b/drivers/pci/pcie/portdrv_core.c > > > @@ -264,6 +264,10 @@ static int pcie_device_init(struct pci_dev *pdev, > int service, int irq) > > > int retval; > > > struct pcie_device *pcie; > > > struct device *device; > > > +#if defined(CONFIG_ARCH_ZYNQMP) && > defined(CONFIG_PCIE_XILINX_NWL) > > > + if (service == PCIE_PORT_SERVICE_AER && pdev->sysdata) > > > + irq = *(int *)pdev->sysdata; > > > +#endif > > > > I remember seeing a similar patch before. > > Are you thinking of [1]? Thanks for reviewing. Yes this case is also similar to [1]. I'm not aware of this [1]. I will withdraw this current patches. Will work on a different model based on your suggestions. Regards, Bharat
diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c index e0261ad..fa9150e 100644 --- a/drivers/pci/pcie/portdrv_core.c +++ b/drivers/pci/pcie/portdrv_core.c @@ -264,6 +264,10 @@ static int pcie_device_init(struct pci_dev *pdev, int service, int irq) int retval; struct pcie_device *pcie; struct device *device; +#if defined(CONFIG_ARCH_ZYNQMP) && defined(CONFIG_PCIE_XILINX_NWL) + if (service == PCIE_PORT_SERVICE_AER && pdev->sysdata) + irq = *(int *)pdev->sysdata; +#endif pcie = kzalloc(sizeof(*pcie), GFP_KERNEL); if (!pcie)
Xilinx ZynqMP PS PCIe does not report AER interrupts using Advanced Error Interrupt Message Number. The controller has dedicated interrupt line for reporting PCIe errors along with AER. Using dedicated controller irq number for AER which is shared with misc interrupt handler in pcie-xilinx-nwl. This irq number is set using PCI quirk. Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com> --- drivers/pci/pcie/portdrv_core.c | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-)