| Message ID | 1688545032-17748-3-git-send-email-quic_msarkar@quicinc.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Krzysztof Wilczyński |
| Headers | show |
| Series | arm64: qcom: sa8775p: add support for PCIe | expand |
On Wed, Jul 05, 2023 at 01:47:07PM +0530, Mrinmay Sarkar wrote: > Add devicetree YAML binding for Qualcomm QMP PCIe PHY > for SA8775p platform. > > Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com> > --- > .../phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 19 ++++++++++++++++++- > 1 file changed, 18 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml > index a0407fc79563..9309066bfcee 100644 > --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml > +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml > @@ -23,6 +23,8 @@ properties: > - qcom,sm8350-qmp-gen3x1-pcie-phy > - qcom,sm8550-qmp-gen3x2-pcie-phy > - qcom,sm8550-qmp-gen4x2-pcie-phy > + - qcom,sa8775p-qmp-gen4x2-pcie-phy > + - qcom,sa8775p-qmp-gen4x4-pcie-phy Same comment as patch 1. - Mani > > reg: > minItems: 1 > @@ -30,7 +32,7 @@ properties: > > clocks: > minItems: 5 > - maxItems: 6 > + maxItems: 7 > > clock-names: > minItems: 5 > @@ -39,6 +41,7 @@ properties: > - const: cfg_ahb > - const: ref > - const: rchng > + - const: phy_aux > - const: pipe > - const: pipediv2 > > @@ -136,6 +139,20 @@ allOf: > clock-names: > minItems: 6 > > + - if: > + properties: > + compatible: > + contains: > + enum: > + - qcom,sa8775p-qmp-gen4x2-pcie-phy > + - qcom,sa8775p-qmp-gen4x4-pcie-phy > + then: > + properties: > + clocks: > + minItems: 7 > + clock-names: > + maxItems: 7 > + > - if: > properties: > compatible: > -- > 2.39.2 >
On Wed, 05 Jul 2023 13:47:07 +0530, Mrinmay Sarkar wrote: > Add devicetree YAML binding for Qualcomm QMP PCIe PHY > for SA8775p platform. > > Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com> > --- > .../phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 19 ++++++++++++++++++- > 1 file changed, 18 insertions(+), 1 deletion(-) > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.example.dtb: phy@1c18000: clock-names:4: 'phy_aux' was expected from schema $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-pcie-phy.yaml# /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.example.dtb: phy@1c18000: clock-names:5: 'pipe' was expected from schema $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-pcie-phy.yaml# /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.example.dtb: phy@1c24000: clock-names:4: 'phy_aux' was expected from schema $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-pcie-phy.yaml# /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.example.dtb: phy@1c24000: clock-names:5: 'pipe' was expected from schema $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-pcie-phy.yaml# doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/1688545032-17748-3-git-send-email-quic_msarkar@quicinc.com The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
On 05/07/2023 10:17, Mrinmay Sarkar wrote: > Add devicetree YAML binding for Qualcomm QMP PCIe PHY > for SA8775p platform. > > Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com> > --- > .../phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 19 ++++++++++++++++++- > 1 file changed, 18 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml > index a0407fc79563..9309066bfcee 100644 > --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml > +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml > @@ -23,6 +23,8 @@ properties: > - qcom,sm8350-qmp-gen3x1-pcie-phy > - qcom,sm8550-qmp-gen3x2-pcie-phy > - qcom,sm8550-qmp-gen4x2-pcie-phy > + - qcom,sa8775p-qmp-gen4x2-pcie-phy > + - qcom,sa8775p-qmp-gen4x4-pcie-phy > > reg: > minItems: 1 > @@ -30,7 +32,7 @@ properties: > > clocks: > minItems: 5 > - maxItems: 6 > + maxItems: 7 > > clock-names: > minItems: 5 > @@ -39,6 +41,7 @@ properties: > - const: cfg_ahb > - const: ref > - const: rchng > + - const: phy_aux Nope, you didn't test, did you? You cannot just add entries in the middle - you break all the boards. Plus, you clearly missed to update the if:else and all this won't work. Just test the bindings before sending them. > - const: pipe > - const: pipediv2 > > @@ -136,6 +139,20 @@ allOf: > clock-names: > minItems: 6 This is not valid anymore. > > + - if: > + properties: > + compatible: > + contains: > + enum: > + - qcom,sa8775p-qmp-gen4x2-pcie-phy > + - qcom,sa8775p-qmp-gen4x4-pcie-phy > + then: > + properties: > + clocks: > + minItems: 7 > + clock-names: > + maxItems: 7 Keep the same approach for clocks and clock-names. Not min here, max there. > + > - if: > properties: > compatible: Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml index a0407fc79563..9309066bfcee 100644 --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml @@ -23,6 +23,8 @@ properties: - qcom,sm8350-qmp-gen3x1-pcie-phy - qcom,sm8550-qmp-gen3x2-pcie-phy - qcom,sm8550-qmp-gen4x2-pcie-phy + - qcom,sa8775p-qmp-gen4x2-pcie-phy + - qcom,sa8775p-qmp-gen4x4-pcie-phy reg: minItems: 1 @@ -30,7 +32,7 @@ properties: clocks: minItems: 5 - maxItems: 6 + maxItems: 7 clock-names: minItems: 5 @@ -39,6 +41,7 @@ properties: - const: cfg_ahb - const: ref - const: rchng + - const: phy_aux - const: pipe - const: pipediv2 @@ -136,6 +139,20 @@ allOf: clock-names: minItems: 6 + - if: + properties: + compatible: + contains: + enum: + - qcom,sa8775p-qmp-gen4x2-pcie-phy + - qcom,sa8775p-qmp-gen4x4-pcie-phy + then: + properties: + clocks: + minItems: 7 + clock-names: + maxItems: 7 + - if: properties: compatible:
Add devicetree YAML binding for Qualcomm QMP PCIe PHY for SA8775p platform. Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com> --- .../phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-)